
24
μPD780948, μPD78F0948, μPD780949, μPD78F0949
Table No.
Title
Page
11-1
11-2
11-3
11-4
11-5
Watchdog Timer Inadvertent Program Overrun Detection Times ........................................
Interval Times ....................................................................................................................
Watchdog Timer Configuration............................................................................................
Watchdog Timer Overrun Detection Time ...........................................................................
Interval Timer Interval Time................................................................................................
197
197
198
201
202
12-1
Clock Output Control Circuit Configuration .........................................................................
207
13-1
A/D Converter Configuration ..............................................................................................
210
14-1
Differences between the Serial Interface Channels ............................................................
225
15-1
15-2
Composition of SIO30........................................................................................................
List of SFRs (Special Function Registers) .........................................................................
228
228
16-1
16-2
Composition of SIO31........................................................................................................
List of SFRs (Special Function Registers) .........................................................................
235
235
17-1
17-2
17-3
17-4
17-5
Configuration of UART .......................................................................................................
List of SFRs (Special Function Registers) .........................................................................
Relation between 5-bit Counter’s Source Clock and “n” Value .............................................
Relation between Main System Clock and Baud Rate........................................................
Causes of Receive Errors ..................................................................................................
243
244
252
253
259
18-1
18-2
18-3
18-4
18-5
18-6
18-7
18-8
18-9
18-10
18-11
18-12
18-13
18-14
18-15
18-16
18-17
18-18
18-19
18-20
18-21
18-22
18-23
18-24
Outline of the Function.......................................................................................................
Bit Number of the Identifier ................................................................................................
RTR Setting .......................................................................................................................
Mode Setting .....................................................................................................................
Data Length Code Setting ..................................................................................................
Bit Length of the Intermission ............................................................................................
Operation in the Error State ...............................................................................................
Definition of each Field ......................................................................................................
Definition of each Frame ....................................................................................................
Bus Priority Decision .........................................................................................................
Bit Stuffing.........................................................................................................................
Error Types.........................................................................................................................
Output Timing of the Error Frame .......................................................................................
Types of Error State ...........................................................................................................
Error Counter .....................................................................................................................
Segment Name and Segment Length.................................................................................
CAN Configuration .............................................................................................................
SFR Definitions..................................................................................................................
SFR Bit Definitions ............................................................................................................ 283
Message and Buffer Structure ...........................................................................................
Transmit Message Structure ..............................................................................................
Receive Message Structure ...............................................................................................
Mask Function ...................................................................................................................
Possible Setup of the SOFOUT Function...........................................................................
262
265
266
266
266
268
268
269
270
271
271
272
272
273
274
275
282
283
284
286
291
297
302