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參數(shù)資料
| 型號(hào)： | XRT83SL30 |
| 廠(chǎng)商： | Exar Corporation |
| 英文描述： | SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| 中文描述： | 單通道的T1/E1/J1上海收發(fā)器時(shí)鐘恢復(fù)和抖動(dòng)衰減器 |
| 文件頁(yè)數(shù)： | 5/76頁(yè) |
| 文件大小： | 376K |
| 代理商： | XRT83SL30 |
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XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.0.4
II
Internal Receive Termination Mode ................................................................................................................. 26
T
ABLE
6: R
ECEIVE
T
ERMINATION
C
ONTROL
................................................................................................ 26
Figure 11. Simplified Diagram for the Internal Receive and Transmit Termination Mode .............. 26
T
ABLE
7: R
ECEIVE
T
ERMINATIONS
............................................................................................................. 27
Figure 12. Simplified Diagram for T1 in the External Termination Mode (RXTSEL= 0) ................... 27
TRANSMITTER ........................................................................................................................................ 28
Transmit Termination Mode ............................................................................................................................. 28
External Transmit Termination Mode ............................................................................................................... 28
Figure 13. Simplified Diagram for E1 in External Termination Mode (RXTSEL= 0) ......................... 28
T
ABLE
8: T
RANSMIT
T
ERMINATION
C
ONTROL
............................................................................................. 28
T
ABLE
9: T
ERMINATION
S
ELECT
C
ONTROL
................................................................................................. 28
REDUNDANCY APPLICATIONS ............................................................................................................. 29
T
ABLE
10: T
RANSMIT
T
ERMINATION
C
ONTROL
........................................................................................... 29
T
ABLE
11: T
RANSMIT
T
ERMINATIONS
......................................................................................................... 29
TYPICAL REDUNDANCY SCHEMES ..................................................................................................... 30
Figure 14. Simplified Block Diagram of the Transmit Section for 1:1 & 1+1 Redundancy ............. 31
Figure 15. Simplified Block Diagram - Receive Section for 1:1 and 1+1 Redundancy .................... 31
Figure 16. Simplified Block Diagram - Transmit Section for N+1 Redundancy ............................... 32
Figure 17. Simplified Block Diagram - Receive Section for N+1 Redundancy ................................. 33
P
ATTERN
T
RANSMIT
AND
D
ETECT
F
UNCTION
............................................................................................... 34
T
RANSMIT
A
LL
O
NES
(TAOS) .................................................................................................................... 34
N
ETWORK
L
OOP
C
ODE
D
ETECTION
AND
T
RANSMISSION
.............................................................................. 34
T
ABLE
12: P
ATTERN
TRANSMISSION
CONTROL
............................................................................................ 34
T
RANSMIT
AND
D
ETECT
Q
UASI
-R
ANDOM
S
IGNAL
S
OURCE
(TDQRSS) ......................................................... 35
T
ABLE
13: L
OOP
-C
ODE
D
ETECTION
C
ONTROL
........................................................................................... 35
L
OOP
-B
ACK
M
ODES
................................................................................................................................... 37
L
OCAL
A
NALOG
L
OOP
-B
ACK
(ALOOP) ....................................................................................................... 37
T
ABLE
14: L
OOP
-
BACK
CONTROL
IN
H
ARDWARE
MODE
.............................................................................. 37
T
ABLE
15: L
OOP
-
BACK
CONTROL
IN
H
OST
MODE
........................................................................................ 37
Figure 18. Local Analog Loop-back signal flow .................................................................................. 37
R
EMOTE
L
OOP
-B
ACK
(RLOOP) ................................................................................................................. 38
Figure 19. Remote Loop-back mode with jitter attenuator selected in receive path ....................... 38
Figure 20. Remote Loop-back mode with jitter attenuator selected in Transmit path .................... 38
D
IGITAL
L
OOP
-B
ACK
(DLOOP) .................................................................................................................. 39
D
UAL
L
OOP
-B
ACK
...................................................................................................................................... 39
Figure 21. Digital Loop-back mode with jitter attenuator selected in Transmit path ...................... 39
Figure 22. Signal flow in Dual loop-back mode ................................................................................... 39
HOST MODE SERIAL INTERFACE OPERATION ........................................................... 40
U
SING
THE
M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
...................................................................................... 40
Figure 23. Microprocessor Serial Interface Data Structure ................................................................ 41
T
ABLE
16: M
ICROPROCESSOR
R
EGISTER
A
DDRESS
................................................................................... 42
T
ABLE
17: M
ICROPROCESSOR
R
EGISTER
B
IT
M
AP
..................................................................................... 42
T
ABLE
18: M
ICROPROCESSOR
R
EGISTER
#0
BIT
DESCRIPTION
.................................................................... 44
T
ABLE
19: M
ICROPROCESSOR
R
EGISTER
#1
BIT
DESCRIPTION
.................................................................... 44
T
ABLE
20: M
ICROPROCESSOR
R
EGISTER
#2
BIT
DESCRIPTION
.................................................................... 47
T
ABLE
21: M
ICROPROCESSOR
R
EGISTER
#3
BIT
DESCRIPTION
.................................................................... 49
T
ABLE
22: M
ICROPROCESSOR
R
EGISTER
#4
BIT
DESCRIPTION
.................................................................... 51
T
ABLE
23: M
ICROPROCESSOR
R
EGISTER
#5
BIT
DESCRIPTION
.................................................................... 52
T
ABLE
24: M
ICROPROCESSOR
R
EGISTER
#6
BIT
DESCRIPTION
.................................................................... 54
T
ABLE
25: M
ICROPROCESSOR
R
EGISTER
#7
BIT
DESCRIPTION
.................................................................... 55
T
ABLE
26: M
ICROPROCESSOR
R
EGISTER
#8
BIT
DESCRIPTION
.................................................................... 55
T
ABLE
27: M
ICROPROCESSOR
R
EGISTER
#9
BIT
DESCRIPTION
.................................................................... 56
T
ABLE
28: M
ICROPROCESSOR
R
EGISTER
#10
BIT
DESCRIPTION
.................................................................. 56
T
ABLE
29: M
ICROPROCESSOR
R
EGISTER
#11
BIT
DESCRIPTION
.................................................................. 56
T
ABLE
30: M
ICROPROCESSOR
R
EGISTER
#12
BIT
DESCRIPTION
.................................................................. 57
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| XRT83VSH314 | 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT83SL30ES | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1 CHT1/E1 LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83SL30IV | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83SL30IV-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT83SL30IVTR-F | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83SL314 | 制造商:EXAR 制造商全稱(chēng):EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT |
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