參數(shù)資料
型號(hào)： XRT83SL30
廠商： Exar Corporation
英文描述： SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述： 單通道的T1/E1/J1上海收發(fā)器時(shí)鐘恢復(fù)和抖動(dòng)衰減器
文件頁(yè)數(shù)： 23/76頁(yè)
文件大?。?/td> 376K
代理商： XRT83SL30
á
XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
typically -38dB (-29dB + -9dB). A 3dB hysteresis was designed so that transients will not trigger the RLOS to
clear. Therefore, the RLOS will typically clear at a total flat loss of -35dB. See
Figure 7
for a simplified diagram.
REV. P1.0.4
20
RECEIVE HDB3/B8ZS DECODER
The Decoder function is available in both
Hardware
and
Host
modes by controlling the TNEG/CODE pin or the
CODE interface bit. The decoder function is only active in single-rail Mode. When selected, receive data in this
mode will be decoded according to HDB3 rules for E1 and B8ZS for T1 systems. Bipolar violations that do not
conform to the coding scheme will be reported as Line Code Violation at the RNEG/LCV pin. The length of the
LCV pulse is one RCLK cycle for each code violation. Excessive number of zeros in the receive data stream is
also reported as an error at the same output pin. If AMI decoding is selected in single rail mode, every bipolar
violation in the receive data stream will be reported as an error at the RNEG/LCV pin.
RECOVERED CLOCK (RCLK) SAMPLING EDGE
This feature is available in both
Hardware
and
Host
modes. In
Host
mode, the sampling edge of RCLK output
can be changed through the interface control bit RCLKE. If a “1” is written in the RCLKE interface bit, receive
data output at RPOS/RDATA and RNEG/LCV are updated on the falling edge of RCLK. Writing a “0” to the
RCLKE register, updates the receive data on the rising edge of RCLK. In
Hardware
mode the same feature is
available under the control of the RCLKE pin.
JITTER ATTENUATOR
F
IGURE
7. S
IMPLIFIED
D
IAGRAM
OF
-29dB T1/E1 G
AIN
M
ODE
AND
RLOS C
ONDITION
F
IGURE
8. R
ECEIVE
C
LOCK
AND
O
UTPUT
D
ATA
T
IMING
Normalized up to +29dB Max
Normalized up to +29dB Max
Declare LOS
Clear LOS
-9dB
+3dB
Clear LOS
Declare LOS
+3dB
-9dB
RCLK
R
RCLK
F
RCLK
RPOS
or
RNEG
R
DY
R
HO
相關(guān)PDF資料
PDF描述
XRT83SL30IV SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
XRT83VSH28 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH28IB 8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83VSH314IB 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT83SL30ES 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 1 CHT1/E1 LIUSH RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83SL30IV 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
XRT83SL30IV-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT83SL30IVTR-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83SL314 制造商:EXAR 制造商全稱:EXAR 功能描述:14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
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