參數(shù)資料
型號(hào): XRT83SL30
廠商: Exar Corporation
英文描述: SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述: 單通道的T1/E1/J1上海收發(fā)器時(shí)鐘恢復(fù)和抖動(dòng)衰減器
文件頁(yè)數(shù): 27/76頁(yè)
文件大?。?/td> 376K
代理商: XRT83SL30
á
XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
DRIVER FAILURE MONITOR (DMO)
REV. P1.0.4
24
The driver monitor circuit is used to detect transmit driver failure by monitoring the activities at TTIP and
TRING. Driver failure may be caused by a short circuit in the primary transformer or system problems at the
transmit input. If the transmitter has no output for more than 128 clock cycles, the corresponding DMO pin goes
“High” and remains “High” until a valid transmit pulse is detected. In
Host
mode, the failure of the transmit
channel is reported in the corresponding interface bit. If the DMOIE bit is also enabled, any transition on the
DMO interface bit will generate an interrupt. The driver failure monitor is supported in both
Hardware
and
Host
modes.
TRANSMIT PULSE SHAPER & LINE BUILD OUT (LBO) CIRCUIT
The transmit pulse shaper circuit uses the high speed clock from the Master timing generator to control the
shape and width of the transmitted pulse. The internal high-speed timing generator eliminates the need for a
tightly controlled transmit clock (TCLK) duty cycle. With the jitter attenuator not in the transmit path, the
transmit output will generate no more than 0.025Unit Interval (UI) peak-to-peak jitter. In
Hardware
mode, the
state of the EQC[4:0] pins determine the transmit pulse shape. In
Host
mode transmit pulse shape can be
controlled using the interface bits EQC[4:0]. The chip supports five fixed transmit pulse settings for T1 Short-
haul applications plus a fully programmable waveform generator for arbitrary transmit output pulse shapes.
The choice of the transmit pulse shape under the control of the interface bits are summarized in
Table 5
.
N
OTE
:
EQC[4:0] determine the T1/E1 operating mode of the XRT83SL30. When EQC4 = “1” and EQC3 = “1”, the
XRT83SL30 is in the E1 mode, otherwise it is in the T1/J1 mode.
T
ABLE
5: R
ECEIVE
E
QUALIZER
C
ONTROL
AND
T
RANSMIT
L
INE
B
UILD
-O
UT
S
ETTINGS
EQC4
EQC3
EQC2
EQC1
EQC0
T1/E1 M
ODE
& R
ECEIVE
S
ENSITIVITY
T
RANSMIT
LBO
C
ABLE
C
ODING
0
1
0
0
0
T1 Short Haul/15dB
0-133 ft./ 0.6dB
100
/ TP
B8ZS
0
1
0
0
1
T1 Short Haul/15dB
133-266 ft./ 1.2dB
100
/ TP
B8ZS
0
1
0
1
0
T1 Short Haul/15dB
266-399 ft./ 1.8dB
100
/ TP
B8ZS
0
1
0
1
1
T1 Short Haul/15dB
399-533 ft./ 2.4dB
100
/ TP
B8ZS
0
1
1
0
0
T1 Short Haul/15dB
533-655 ft./ 3.0dB
100
/ TP
B8ZS
0
1
1
0
1
T1 Short Haul/15dB
Arbitrary Pulse
100
/ TP
B8ZS
0
1
1
1
0
T1 Gain Mode/29dB
0-133 ft./ 0.6dB
100
/ TP
B8ZS
0
1
1
1
1
T1 Gain Mode/29dB
133-266 ft./ 1.2dB
100
/ TP
B8ZS
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