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參數(shù)資料
| 型號： | XRT83L34IV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 8/99頁 |
| 文件大小： | 0K |
| 描述： | IC LIU T1/E1/J1 QUAD 128TQFP |
| 標(biāo)準(zhǔn)包裝： | 72 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動器/接收器數(shù)： | 4/4 |
| 規(guī)程： | T1，E1，J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-LQFP |
| 供應(yīng)商設(shè)備封裝： | 128-TQFP（14x20） |
| 包裝： | 托盤 |
| 其它名稱： | XRT83L34IV-F-ND |
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XRT83L34
xr
REV. 1.0.1
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
13
MICROPROCESSOR INTERFACE
SIGNAL NAME
PIN #
TYPE
DESCRIPTION
HW_HOST
68
I
HOST/HARDWARE Mode Control Input pin:
This pin permits the user to configure the XRT83L34 device to operate in
either the HOST or the Hardware Mode. If the user configures the XRT83L34
device to operate in the HOST Mode, then the Microprocessor Interface
block will become active and virtually all configuration settings (within the
XRT83L34 device) will be achieved by writing values into the on-chip regis-
ters (via the Microprocessor Interface). If the user configures the XRT83L34
device to operate in the Hardware Mode, then the Microprocessor Interface
block will be disabled, and all configuration settings (within the XRT83L34
device) will be achieved by setting various input pins to logic HIGH or LOW
settings.
LOGIC LOW - Configures the XRT83L34 device to operate in the HOST
Mode.
LOGIC HIGH or FLOATING - Configures the XRT83L34 device to operate in
the Hardware Mode.
NOTE: Internally pulled “High” with a 50k
resistor.
WR_R/W
TAOS_0
69
I
Write Strobe/Read-Write Operation Identifier/Transmit All Ones Input
Pin - Channel 0:
The exact function of this input pin depends upon whether the XRT83L34
device has been configured to operate in the HOST or the Hardware Mode,
as described below.
HOST Mode Operation - Write Strobe/Read-Write Operation Identifier:
Assuming that the XRT83L34 device has been configured to operate in the
Host Mode, then the exact function of the this input pin depends upon which
mode the Microprocessor Interface has been configured to operate in, as
described below.
Intel-Asynchronous Mode - WR* - Write Strobe Input pin:
If the Microprocessor Interface is configured to operate in the Intel-Asynchro-
nous Mode, then this input pin functions as the WR* (Active-Low WRITE
Strobe) input signal from the Microprocessor. Once this active-low signal is
asserted, then the input buffers (associated with the Bi-Direction Data bus
pins, D[7:0]) will be enabled. The Microprocessor Interface will latch the con-
tents on the Bi-Directional Data Bus (into the "target" register or address
location, within the XRT83L34) upon the rising edge of this input pin.
Motorola-Asynchronous Mode - R/W* - Read/Write Operation Identifica-
tion Input pin:
If the Microprocessor Interface is operating in the "Motorola-Asynchronous"
Mode, then this pin is functionally equivalent to the R/W* input pin. In the
Motorola-Asynchronous Mode, a READ operation occurs if this pin is held at
a logic "1", coincident to a falling edge of the RD/DS* (Data Strobe) input pin.
Similarly, a WRITE operation occurs if this input is at a logic "0", coincident to
a falling edge of the RD/DS* (Data Strobe) input pin.
Hardware Mode Operation - Transmit All “Ones” Channel_0 - Hardware
Mode
NOTE: Internally pulled “Low” with a 50k
resistor.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| XRT83L34IVTR | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83L34IVTR-F | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| XRT83L38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83L38ES | 功能描述:外圍驅(qū)動器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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