參數(shù)資料
型號: XRT83L34IV-F
廠商: Exar Corporation
文件頁數(shù): 30/99頁
文件大?。?/td> 0K
描述: IC LIU T1/E1/J1 QUAD 128TQFP
標準包裝: 72
類型: 線路接口裝置(LIU)
驅動器/接收器數(shù): 4/4
規(guī)程: T1,E1,J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 128-LQFP
供應商設備封裝: 128-TQFP(14x20)
包裝: 托盤
其它名稱: XRT83L34IV-F-ND
XRT83L34
xr
REV. 1.0.1
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
33
TRANSMIT HDB3/B8ZS ENCODER
The Encoder function is available in both Hardware and Host modes on a per channel basis by controlling the
TNEG_n/CODES_n pin or CODES interface bit. The encoder is only available in single-rail mode. In E1 mode
and with HDB3 encoding selected, any sequence with four or more consecutive zeros in the input serial data
from TPOS_n/TDATA_n, will be removed and replaced with 000V or B00V, where “B” indicates a pulse
conforming with the bipolar rule and “V” representing a pulse violating the rule. An example of HDB3 Encoding
is shown in Table 3. In a T1 system, an input data sequence with eight or more consecutive zeros will be
removed and replaced using the B8ZS encoding rule. An example of Bipolar with 8 Zero Substitution (B8ZS)
encoding scheme is shown in Table 4. Writing a “1” into the CODES_n interface bit or connecting the TNEG_n/
CODES_n pin to a “High” level selects the AMI coding for both E1 or T1 systems.
DRIVER FAILURE MONITOR (DMO)
FIGURE 12. TRANSMIT CLOCK AND INPUT DATA TIMING
TABLE 3: EXAMPLES OF HDB3 ENCODING
NUMBER OF PULSE BEFORE NEXT 4 ZEROS
NEXT 4 BITS
Input
0000
HDB3 (case1)
odd
000V
HDB3 (case2)
even
B00V
TABLE 4: EXAMPLES OF B8ZS ENCODING
CASE 1
PRECEDING PULSE
NEXT 8 BITS
Input
+
00000000
B8ZS
000VB0VB
AMI Output
+
000+ -0- +
CASE 2
Input
-
00000000
B8ZS
000VB0VB
AMI Output
-
000- +0+ -
TCLK
R
TCLK
F
TCLK
TPOS/TDATA
or
TNEG
T
SU
T
HO
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