- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375050 > XQ4005E (Xilinx, Inc.) High-Reliability Field Programmable Gate Arrays(高可靠性現(xiàn)場可編程門陣列) PDF資料下載
參數(shù)資料
| 型號： | XQ4005E |
| 廠商： | Xilinx, Inc. |
| 英文描述： | High-Reliability Field Programmable Gate Arrays(高可靠性現(xiàn)場可編程門陣列) |
| 中文描述： | 高可靠性的現(xiàn)場可編程門陣列（高可靠性現(xiàn)場可編程門陣列） |
| 文件頁數(shù)： | 4/34頁 |
| 文件大?。?/td> | 529K |
| 代理商： | XQ4005E |
第1頁第2頁第3頁當(dāng)前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
QPRO
TM
XQ4000E/EX QML High-Reliability Field Programmable Gate Arrays
4
May 19, 1998 (Version 2.1)
XQ4000E Horizontal Longline Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Internal timing parameters are derived from measuring internal test patterns. Listed below are
representative values. For more specific, more precise, and worst-case guaranteed data, use the values reported by the
static timing analyzer
(TRCE in the Xilinx Development System)
and back-annotated to the simulation netlist. These path
delays, provided as a guideline, have been extracted from the static timing analyzer report. All timing parameters assume
worst-case operating conditions (supply voltage and junction temperature). Values apply to all XQ4000E/EX devices unless
otherwise noted.
The following guidelines reflect worst-case values over the recommended operating conditions.
Note 1:
These values include a minimum load. Use the static timing analyzer to determine the delay for each destination.
Speed Grade
Description
TBUF driving a Horizontal Longline (LL):
I going High or Low to LL going High or Low, while T is Low.
Buffer is constantly active. (Note1)
-3
-4
Units
Symbol
Device
Max
Max
T
IO1
XQ4005E
XQ4010E
XQ4013E
XQ4025E
XQ4005E
XQ4010E
XQ4013E
XQ4025E
XQ4005E
XQ4010E
XQ4013E
XQ4025E
6.4
7.2
5.0
8.0
9.0
11.0
6.0
10.5
11.0
12.0
7.0
8.5
8.7
11.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
I going Low to LL going from resistive pull-up High to active Low.
TBUF configured as open-drain. (Note1)
T
IO2
6.9
7.7
T going Low to LL going from resistive pull-up or floating High to
active Low.
TBUF configured as open-drain or active buffer with I = Low.
(Note1)
T going High to TBUF going inactive, not driving LL
T
ON
7.3
7.5
T
OFF
XQ4005E
XQ4010E
XQ4013E
XQ4025E
XQ4005E
XQ4010E
XQ4013E
XQ4025E
XQ4005E
XQ4010E
XQ4013E
XQ4025E
1.8
3.0
3.5
4.0
23.0
29.0
32.0
42.0
10.0
13.5
15.0
18.0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
T going High to LL going from Low to High, pulled up by a single
resistor. (Note 1)
T
PUS
22
26
T going High to LL going from Low to High, pulled up by two resis-
tors. (Note1)
T
PUF
11
13
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XQ4013XL-1CB240N | QML High-Reliability FPGAs |
| XQ4000XL | QML High-Reliability FPGAs |
| XQ4013XL-1BG228M | QML High-Reliability FPGAs |
| XQ4013XL-1BG228N | QML High-Reliability FPGAs |
| XQ4013XL-1BG240M | QML High-Reliability FPGAs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XQ4005E-3BG191M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4005E-3BG191N | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4005E-3BG196M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4005E-3BG196N | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
| XQ4005E-3CB191M | 制造商:XILINX 制造商全稱:XILINX 功能描述:QML High-Reliability FPGAs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。