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參數資料
| 型號： | XQ4005E |
| 廠商： | Xilinx, Inc. |
| 英文描述： | High-Reliability Field Programmable Gate Arrays(高可靠性現場可編程門陣列) |
| 中文描述： | 高可靠性的現場可編程門陣列（高可靠性現場可編程門陣列） |
| 文件頁數： | 19/34頁 |
| 文件大?。?/td> | 529K |
| 代理商： | XQ4005E |
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May 19, 1998 (Version 2.1)
19
XQ4028EX Longline and Wide Decoder Timing Guidelines
Testing of switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Internal timing parameters are derived from measuring internal test patterns. Listed below are
representative values. For more specific, more precise, and worst-case guaranteed data, use the values reported by the
static timing analyzer
(TRCE in the Xilinx Development System)
and back-annotated to the simulation netlist. These path
delays, provided as a guideline, have been extracted from the static timing analyzer report. All timing parameters assume
worst-case operating conditions (supply voltage and junction temperature). Values apply to all XQ4000EX devices unless
otherwise noted. Fewer than the specified number of pullup resistors can be used, if desired. Using fewer pullups reduces
power consumption but increases delays. Use the static timing analyzer to determine delays if fewer pullups are used.
XQ4028EX Horizontal Longline Switching Characteristic Guidelines
Note 1: These values include a minimum load of one output, spaced as far as possible from the activated pullup(s). Use the static timing ana-
lyzer to determine the delay for each destination.
XQ4028EX Wide Decoder Switching Characteristic Guidelines
Note 1: These delays are specified from the decoder input to the decoder output.
Speed Grade
Description
TBUF driving a Horizontal Longline
I going High or Low to Horizontal Longline going High or Low, while T is Low. Buffer
is constantly active.
T going Low to Horizontal Longline going from resistive pull-up or floating High to
active Low. TBUF configured as open-drain or active buffer with I = Low.
T going High to Horizontal Longline going from Low to High, pulled up by two resis-
tors. (Note 1)
TBUF driving Half a Horizontal Longline
I going High or Low to half of a Horizontal Longline going High or Low, while T is
Low. Buffer is constantly active.
T going Low to half of a Horizontal Longline going from resistive pull-up or floating
High to active Low. TBUF configured as open-drain or active buffer with I = Low.
T going High to half of a Horizontal Longline going from Low to High, pulled up by
four resistors. (Note 1)
-4
Units
Symbol
Max
T
IO1
13.7
ns
T
ON
14.7
ns
T
PU2
ns
ns
T
HIO1
6.3
ns
T
HON
7.2
ns
T
HPU4
ns
Speed Grade
Description
Full length, two pull-ups, inputs from IOB I-pins
-4
Units
Symbol
T
WAF2
Max
ns
ns
ns
ns
ns
ns
ns
ns
Full length, two pull-ups, inputs from internal logic
T
WAF2L
Half length, two pull-ups, inputs from IOB I-pins
T
WAO2
Half length, two pull-ups, inputs from internal logic
T
WAO2L
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