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參數(shù)資料
| 型號： | WED3DL3216V8BC |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 16M X 32 SYNCHRONOUS DRAM, 6 ns, PBGA119 |
| 封裝： | 17 X 23 MM, MO-163, BGA-119 |
| 文件頁數(shù)： | 23/27頁 |
| 文件大小： | 989K |
| 代理商： | WED3DL3216V8BC |
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White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WED3DL3216V
November, 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specications without notice.
Parameter
Symbol
133MHZ
125MHZ
100MHZ
Units
Min
Max
Min
Max
Min
Max
CL = 3
tCC
7
1000
8
1000
10
1000
ns
CL = 2
tCC
7.5
1000
10
1000
12
1000
Clock to valid Output delay1,2
tSAC
5.4
6
7
ns
Output Data Hold Time2
tOH
33
3
ns
Clock HIGH Pulse Width3
tCH
2.5
3
ns
Clock LOW Pulse Width3
tCL
2.5
3
ns
Input Setup Time3
tSS
1.5
2
ns
Input Hold Time3
tSH
0.8
1
ns
CK to Output Low-Z2
tSLZ
22
2
ns
CK to Output High-Z
tSHZ
5.4
6
7
ns
Row Active to Row Active Delay4
tRRD
24
20
ns
RAS to CAS Delay4
tRCD
24
20
ns
Row Precharge Time4
tRP
24
20
ns
Row Active Time4
tRAS
60
10,000
50
10,000
50
10,000
ns
Row Cycle Time - Operation4
tRC
90
70
80
ns
Row Cycle Time - Auto Refresh4,8
tRFC
90
70
80
ns
Last Data in to New Column Address Delay5
tCDL
11
1
CK
Last Data in to Row Precharge5
tRDL
11
1
CK
Last Data in to Burst Stop5
tBDL
11
1
CK
Column Address to Column Address Delay6
tCCD
1.5
CK
Number of Valid OutputData7
22
2
ea
11
2
SDRAM AC CHARACTERISTICS
NOTES:
1.
Parameters depend on programmed CAS latency.
2.
If clock rise time is longer than 1ns (tRISE/2 -0.5)ns should be added to the parameter.
3.
Assumed input rise and fall time = 1ns. If tRISE or tFALL are longer than 1ns. [(tRISE + tFALL)/2] - 1ns should be added to the parameter.
4.
The minimum number of clock cycles required is detemined by dividing the minimum time required by the clock cycle time and then rounding up to the next higher integer.
5.
Minimum delay is required to complete write.
6.
All devices allow every cycle column address changes.
7.
In case of row precharge interrupt, auto precharge and read burst stop.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| WED3DL3216V8BI | 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16Mx32 SDRAM |
| WED3DL3216V-BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM MCP |
| WED3DL324V10BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SDRAM |
| WED3DL324V8BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SDRAM |
| WED3DL324V-BC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM MCP |
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