參數(shù)資料
型號(hào)： WED3DL3216V8BC
廠商： MICROSEMI CORP-PMG MICROELECTRONICS
元件分類： DRAM
英文描述： 16M X 32 SYNCHRONOUS DRAM, 6 ns, PBGA119
封裝： 17 X 23 MM, MO-163, BGA-119
文件頁(yè)數(shù)： 2/27頁(yè)
文件大?。?/td> 989K
代理商： WED3DL3216V8BC
10
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
WED3DL3216V
November, 2005
Rev. 1
White Electronic Designs Corp. reserves the right to change products or specications without notice.
Current
State
Command
Action
Notes
CE#
RAS#
CAS#
WE#
BA0-1
A0-A12
Description
Refreshing
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
L
H
BA
Row Address Bank Activate
ILLEGAL
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
No Operation; Idle after tRC
L
H
X
No Operation
No Operation; Idle after tRC
H
X
Device Deselect
No Operation; Idle after tRC
Mode
Register
Accessing
L
OP Code
Mode Register Set
ILLEGAL
L
H
X
Auto or Self Refresh
ILLEGAL
L
H
L
X
Precharge
ILLEGAL
L
H
BA
Row Address Bank Activate
ILLEGAL
L
H
L
BA
Column
Write
ILLEGAL
L
H
L
H
BA
Column
Read
ILLEGAL
L
H
L
X
Burst Termination
ILLEGAL
L
H
X
No Operation
No Operation; Idle after two clock cycles
H
X
Device Deselect
No Operation; Idle after two clock cycles
NOTES:
1.
CKE is assumed to be active (high) in the previous cycle for all entries. The Current State is the state of the bank that the command is
being applied to.
2.
Both Banks must be idle otherwise it is an illegal action.
3.
If CKE is active (high) the SDRAM starts the Auto (CBR) Refresh operation, if CKE is inactive (low) then the Self Refresh mode is entered.
4.
The Current State refers only refers to one of the banks, if BA selects this bank then the action is illegal. If BA selects the bank not being
referenced by the Current State then the action may be legal depending on the state of that bank.
5.
If CKE is inactive (low) than the Power Down mode is entered, otherwise there is a No Operation.
6.
The minimum and maximum Active time (tRAS) must be satised.
7.
The RAS# to CAS# Delay (tRCD) must occur before the command is given.
8.
Address A10 is used to determine if the Auto Precharge function is activated.
9.
The command must satisfy any bus contention, bus turn around, and/or write recovery requirements.
10.
The command is illegal if the minimum bank to bank delay time (tRRD) is not satised.
CURRENT STATE TRUTH TABLE (cont.)
相關(guān)PDF資料
PDF描述
WEDPF2M64B-120BC3 2M X 64 FLASH 3.3V PROM MODULE, 120 ns, PBGA119
WS57C45-35T 2K X 8 UVPROM, 15 ns, CDIP24
W25Q64BVZEIP 8M X 8 SPI BUS SERIAL EEPROM, PDSO8
W3DG634V7D2 4M X 64 SYNCHRONOUS DRAM MODULE, DMA168
WPF512K8C70TFI5 512K X 8 FLASH 5V PROM, 70 ns, PDSO32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
WED3DL3216V8BI 制造商:WEDC 制造商全稱:White Electronic Designs Corporation 功能描述:16Mx32 SDRAM
WED3DL3216V-BC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM MCP
WED3DL324V10BC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SDRAM
WED3DL324V8BC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x32 SDRAM
WED3DL324V-BC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM MCP
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*