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參數(shù)資料
| 型號： | W25Q80VZPIG |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 1M X 8 SPI BUS SERIAL EEPROM, DSO8 |
| 封裝： | 6 X 5 MM, GREEN, WSON-8 |
| 文件頁數(shù)： | 35/61頁 |
| 文件大?。?/td> | 1794K |
| 代理商： | W25Q80VZPIG |
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W25Q80, W25Q16, W25Q32
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10.2.23 High Performance Mode (A3h)
The High Performance Mode (HPM) instruction must be executed prior to Dual or Quad I/O instructions
when operating at high frequencies (see FR and FR1 in AC Electrical Characteristics). This instruction
allows pre-charging of internal charge pumps so the voltages required for accessing the Flash memory
array are readily available. The instruction sequence includes the A3h instruction code followed by
three dummy byte clocks shown in Fig. 23. (Contact Winbond for the latest 25Q data sheet with
updated HPM diagram). After the HPM instruction is executed, the device will maintain a slightly higher
standby current (Icc3) than standard SPI operation. The Release from Power-down or HPM instruction
(ABh) can be used to return to standard SPI standby current (Icc1).
Figure 23. High Performance Mode Instruction Sequence
10.2.24 Release Power-down or High Performance Mode / Device ID (ABh)
The Release from Power-down or High performance Mode / Device ID instruction is a multi-purpose
instruction. It can be used to release the device from the power-down state or High Performance Mode,
or obtain the devices electronic identification (ID) number.
To release the device from the power-down state or High Performance Mode, the instruction is issued
by driving the /CS pin low, shifting the instruction code “ABh” and driving /CS high as shown in figure 24.
Release from power-down will take the time duration of tRES1 (See AC Characteristics) before the
device will resume normal operation and other instructions are accepted. The /CS pin must remain high
during the tRES1 time duration.
When used only to obtain the Device ID while not in the power-down state, the instruction is initiated by
driving the /CS pin low and shifting the instruction code “ABh” followed by 3-dummy bytes. The Device
ID bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in
figure 25. The Device ID values for the W25Q80, W25Q16, and W25Q32 are listed in Manufacturer and
Device Identification table. The Device ID can be read continuously. The instruction is completed by
driving /CS high.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| W25X16AVDAIZ | 2M X 8 FLASH 2.7V PROM, PDIP8 |
| W25X40AVSSIG | 512K X 8 FLASH 2.7V PROM, PDSO8 |
| W25X80AVDAIZ | 1M X 8 FLASH 2.7V PROM, PDIP8 |
| W25X80ALSSIG | 1M X 8 FLASH 2.7V PROM, PDSO8 |
| W25X40ALDAIZ | 512K X 8 FLASH 2.7V PROM, PDIP8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W25S243A | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25S243A-12 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25S243AD-12 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25S243AF-12 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25X10 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:The W25X10 (1M-bit), W25X20 (2M-bit), W25X40 (4M-bit) and W25X80 (8M-bit) Serial Flash memories provide a storage solution for systems with limited space, pins and power. |
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