參數(shù)資料
型號(hào)： TMS32C5402PGER10G4
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： FIXED-POINT DIGITAL SIGNAL PROCESSOR
中文描述： 定點(diǎn)數(shù)字信號(hào)處理器
文件頁數(shù)： 31/68頁
文件大?。?/td> 948K
代理商： TMS32C5402PGER10G4
SPRS079E – OCTOBER 1998 – REVISED AUGUST 2000
31
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
interrupts
Vector-relative locations and priorities for all internal and external interrupts are shown in Table 13.
Table 13. Interrupt Locations and Priorities
NAME
LOCATION
DECIMAL HEX
PRIORITY
FUNCTION
RS, SINTR
0
00
1
Reset (hardware and software reset)
NMI, SINT16
4
04
2
Nonmaskable interrupt
SINT17
8
08
—
Software interrupt #17
SINT18
12
0C
—
Software interrupt #18
SINT19
16
10
—
Software interrupt #19
SINT20
20
14
—
Software interrupt #20
SINT21
24
18
—
Software interrupt #21
SINT22
28
1C
—
Software interrupt #22
SINT23
32
20
—
Software interrupt #23
SINT24
36
24
—
Software interrupt #24
SINT25
40
28
—
Software interrupt #25
SINT26
44
2C
—
Software interrupt #26
SINT27
48
30
—
Software interrupt #27
SINT28
52
34
—
Software interrupt #28
SINT29
56
38
—
Software interrupt #29
SINT30
60
3C
—
Software interrupt #30
INT0, SINT0
64
40
3
External user interrupt #0
INT1, SINT1
68
44
4
External user interrupt #1
INT2, SINT2
72
48
5
External user interrupt #2
TINT0, SINT3
76
4C
6
Timer0 interrupt
BRINT0, SINT4
80
50
7
McBSP #0 receive interrupt
BXINT0, SINT5
84
54
8
McBSP #0 transmit interrupt
Reserved(DMAC0), SINT6
88
58
9
Reserved (default) or DMA channel 0 inter-
rupt. The selection is made in the DMPREC
register.
TINT1(DMAC1), SINT7
92
5C
10
Timer1 interrupt (default) or DMA channel 1
interrupt. The selection is made in the
DMPREC register.
INT3, SINT8
96
60
11
External user interrupt #3
HPINT, SINT9
100
64
12
HPI interrupt
BRINT1(DMAC2), SINT10
104
68
13
McBSP #1 receive interrupt (default) or DMA
channel 2 interrupt. The selection is made in
the DMPREC register.
BXINT1(DMAC3), SINT11
108
6C
14
McBSP #1 transmit interrupt (default) or DMA
channel 3 interrupt. The selection is made in
the DMPREC register.
DMAC4,SINT12
112
70
15
DMA channel 4 interrupt
DMAC5,SINT13
116
74
16
DMA channel 5 interrupt
Reserved
120–127
78–7F
—
Reserved
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