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| 型號(hào)： | T7264 |
| 廠商： | Lineage Power |
| 英文描述： | U-Interface 2B1Q Transceiver(U接口 2B1Q收發(fā)器) |
| 中文描述： | U型接口2B1Q收發(fā)器（ü接口2B1Q收發(fā)器） |
| 文件頁(yè)數(shù)： | 5/54頁(yè) |
| 文件大?。?/td> | 876K |
| 代理商： | T7264 |
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Data Sheet
April 1998
T7264 U-Interface 2B1Q Transceiver
Lucent Technologies Inc.
5
Pin Information
(continued)
Table 2. Pin Descriptions
(continued)
Pin
13,
14, 15
16
Symbol
NC
Type
—
Name/Function
No Connect.
These pins are connected to internal nodes of the device. Make no con-
nection to them.
Out of Sync (Active-Low).
Indicates that framing on the loop signal has not been ac-
quired (or has been lost). Equivalent to the K2 interface oof bit in the DS octet. Can sink
or source 1.6 mA to drive a low-current external LED. Clocked out on the rising edge
of C.
+5 V Supply for the Crystal Oscillator.
Ground when driving MCLK with an external
15.36 MHz clock.
Ground Supply for Oscillator.
Connection #1 for a 15.36 MHz Crystal.
Connection #2 for a 15.36 MHz Crystal.
Clock Output.
See Table 3.
Master Clock.
See Table 3.
Clock Select.
See Table 3.
High Impedance (Active-Low).
Causes all digital outputs to become 3-stated.
Common-Mode Voltage Reference for the Analog Circuits.
Connect via a 0.1
μ
F
capacitor to GND
A
as close to this pin and pin 34 as possible.
Positive Voltage Reference for the Analog Circuits.
Connect via a 0.1
μ
F capacitor
to GND
A
as close to this pin and pin 34 as possible.
Negative Voltage Reference for the Analog Circuits.
Connect via a 0.1
μ
F capacitor
to GND
A
as close to this pin and pin 34 as possible.
Hybrid Network Connection, Negative Side.
Connect directly to the negative side of
the transformer.
Line Driver Output Terminal, Positive Side.
Connect to the positive side of the trans-
former.
+5 V Supply for Analog Circuits.
OSYNC
O
18
V
DDO
P/I
19
20
21
23
24
25
26
28
GND
O
X1
X2
CKOUT
MCLK
CKSEL
HIGHZ
P
I
I
O
I
I
I
—
VCM
29
VRP
—
30
VRN
—
31
HN
I
32
LOP
O
33,
39, 42
34,
40, 41
35
V
DDA
P
GND
A
P
Ground Supply for Analog Circuits.
LON
O
Line Driver Output Terminal, Negative Side.
Connect to the negative side of the
transformer.
Hybrid Network Connection, Positive Side.
Connect directly to the positive side of
the transformer.
Sigma-Delta A/D Converter Input, Negative Side.
Connect via an 820 pF
±
5%
capacitor to SDNIP.
Sigma-Delta A/D Converter Input, Positive Side.
Connect via an 820 pF
±
5%
capacitor to SDNIN.
80 kHz Receive Baud Clock.
Defines receive baud period (rising edge to rising edge).
36
HP
I
37
SDINN
I
38
SDINP
I
43
RCLKEN
O
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