參數(shù)資料
型號(hào)： T7264
廠商： Lineage Power
英文描述： U-Interface 2B1Q Transceiver(U接口 2B1Q收發(fā)器)
中文描述： U型接口2B1Q收發(fā)器（ü接口2B1Q收發(fā)器）
文件頁(yè)數(shù)： 13/54頁(yè)
文件大?。?/td> 876K
代理商： T7264
Lucent Technologies Inc.
13
Data Sheet
April 1998
T7264 U-Interface 2B1Q Transceiver
K2 Interface Description
(continued)
K2 Bits Description
Table 4 summarizes the K2 interface bits which are
common to all configurations. The K2 frame consists of
eight octets of data. The first three octets contain the
18 bits of 2B+D data. Bits 5—8 of the third octet contain
U frame and superframe timing (DF). Octet 4 (S1) is
reserved for future use and should always be set to 1.
Octets 5, 6, and 7 are directly mapped to the U-inter-
face M (UM) maintenance bits which are transparent to
the device, except the adea bit. Octet 8 is for device
status (DS) and device control (DC). These bits must
be manipulated according to the T1.601 standard to
obtain proper system-level operation.
Figure 11 describes the four different K2 interface for-
mats for DO and DI at the NT and LT. Tables 5—14 de-
scribe the position and meaning of the various bits on
the K2 interface. Tables 15 and 16 show the active logic
level for these bits, their value during reset/idle, and
their value when the transceiver is operational.
Table 4. K2 Interface Serial Data Bit Map
Bits marked with 1 should always be set to a 1. Bits marked as Rxx are reserved by T1.601 and should be set
to a 1.
* Items differ dependent upon NT or LT mode.
Don't care.
Time ----------------------------------------------------------->
Bit 1
Bit 2
Bit 3
B11
B12
B13
B21
B22
B23
D1
D2
1
D1
D2
1
1
1
1
a1
a2
a3
i5
i6
i7
R
2, 5
*
*
nebe
xact
ccrc
istp
lpbk
Symbol
B1
B2
D
DF
S1
UM1
UM2
UM3
DS
DC
Octet
1
2
3
3
4
5
6
7
8
8
Bit 4
B14
B24
1
1
1
dm
i8
*
1
afrst
Bit 5
B15
B25
1
RSF
1
i1
act
*
oof
ldea
Bit 6
B16
B26
1
RF
1
i2
R
1, 5
R
6, 4
1
1
Bit 7
B17
B27
1
TSF
1
i3
R
1, 6
*
rsksi
sksi
Bit 8
B18
B28
1
TF
1
i4
*
*
1
xpcy
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