參數(shù)資料
型號(hào): T7234
英文描述: Compliance with the New ETSI PSD Requirement
中文描述: 符合新的ETSI PSD的要求
文件頁(yè)數(shù): 105/116頁(yè)
文件大?。?/td> 1056K
代理商: T7234
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Data Sheet
January 1998
T7256 Single-Chip NT1 (SCNT1) Transceiver
Lucent Technologies Inc.
101
Questions and Answers
(continued)
Miscellaneous
(continued)
Q53:
Can you provide detailed information on the
active and idle power consumption of the T7256
A53:
The IDLE power of the T7256 is typically 35 mW.
The IDLE power will be increased if CKOUT or
the TDM highway are active. The discussion
below presents accurate numbers for adding in
the effects of CKOUT and the TDM highway.
When considering active power measurement fig-
ures, it is important to note that the conditions
under which power measurements are made are
not always completely stated by 2B1Q IC ven-
dors. For example, loop length is not typically
mentioned in the context of power dissipation, yet
power dissipation on a short loop is noticeably
greater than on a long loop. There are two rea-
sons for the increased power dissipation at
shorter loop lengths:
1. The overall loop impedance is smaller, requir-
ing a higher current to drive the loop.
2. The far-end transceiver is closer, requiring the
near-end transceiver to sink more far-end cur-
rent in order to maintain a virtual ground at its
transmitter outputs.
The following lab measurements provide an
example of how power dissipation varies with
loop length for a specific T7256 with its
15.36 MHz CKOUT output disabled (see the fol-
lowing table for information on CKOUT). Note that
power dissipation on a 0-length loop (the worst-
case loop) is about 35 mW higher than on a loop
of >3 kft length—a significant difference. Thus,
loop length needs to be considered when deter-
mining worst-case power numbers.
Table 43. Power Dissipation Variation
* This is the configuration used by some IC manufacturers.
Also, in the case of the T7256, the use of the out-
put clock CKOUT (pin 17) needs to be considered
since its influence on power dissipation is signifi-
cant. Some applications may make use of this
clock, while others may leave it 3-stated. The
power dissipation of CKOUT is shown in Table
44.
Table 44. Power Dissipation of CKOUT
Another factor influencing power consumption is
the S/T-interface data pattern. For example, when
transmitting an INFO 4 pattern with all 1s data in
the B and D channels, the power consumption is
25 mW lower than it is when transmitting INFO 2,
because INFO 2 is worst case in terms of the
amount of +0 and –0 transitions, and INFO 4 is
best case if the data is all 1s. A typical number
would lie about midway between these two. The
T7256 TDM highway, when active, can add
another 3 mW of power.
Loop Configuration
18 kft/26 awg
6 kft/26 awg
3 kft/26 awg
2 kft/26 awg
1 kft/26 awg
0.5 kft/26 awg
0 kft
135
load, ILOSS or
LPBK active, no far-end
transceiver*
Power (mW)
270
270
274
277
285
293
305
278
CKOUT
Frequency
(MHz)
15.36
10.24
Power Due to
CKOUT 40 pF
Load (mW)
21.3
17.7
Power Due to
CKOUT No
Load (mW)
11.0
9.1
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