
Index
IX-3
(SSTAT0)
4-43
(SSTAT1)
4-45
(SSTAT2)
4-46
(START)
4-25
(STD)
4-69
(STEST0)
4-85
(STEST1)
4-86
(STEST2)
4-87
(STEST3)
4-89
(STEST4)
4-91
(STIME0)
4-81
(STIME1)
4-82
(STO)
4-74
,
4-78
(SWIDE)
4-79
(SXFER)
4-34
(SZM)
4-88
(TE)
4-89
(TEMP)
4-56
(TRG)
4-27
(TTM)
4-90
(UA)
4-114
(UDC)
4-73
,
4-77
(VAL)
4-39
(VER[2:0])
4-19
(VUE0)
4-31
(VUE1)
4-31
(WATN)
4-26
(WIE)
4-4
(WOA)
4-44
(WRIE)
4-56
(WSR)
4-31
(WSS)
4-31
Numerics
32/64 bit jump
5-31
32-bit addressing
5-7
3-state
3-2
64 Kbytes ROM read cycle
6-56
,
6-57
64-bit
addressing
5-8
addressing in SCRIPTS
2-21
table indirect indexing mode (64TIMOD)
4-95
A
A and B DIFFSENS SCSI signals
6-3
A[6:0]
5-23
A_DIFFSENS
3-18
A_GPIO0_ FETCH/
3-15
A_GPIO1_ MASTER/
3-15
A_GPIO2
3-15
A_GPIO3
3-15
A_GPIO4
3-15
A_SACK+-
3-19
A_SATN+-
3-19
A_SBSY+-
3-19
A_SC_D+-
3-19
A_SDP[1:0]+-
3-18
A_SI_O+-
3-19
A_SMSG+-
3-19
A_SREQ+-
3-19
A_SRST+-
3-19
A_SSEL+-
3-19
abort operation (ABRT)
4-48
aborted (ABRT)
4-41
,
4-67
absolute maximum stress ratings
6-1
AC characteristics
6-11
ACK64/
3-11
acknowledge 64
3-11
active termination
2-41
AD[63:0]
3-10
adder sum output (ADDER)
4-71
address and data signals
3-10
address/data bus
2-3
alt interrupt
A
3-14
B
3-14
arbitration
in progress (AIP)
4-44
mode bits 1 and 0 (ARB[1:0])
4-24
priority encoder test (ART)
4-85
signals
3-12
assert
even SCSI parity (force bad parity) (AESP)
4-29
SATN/ on parity/CRC error (AAP)
4-27
SCSI
ACK/ signal (ACK)
4-38
,
4-40
ATN/ signal (ATN)
4-38
,
4-40
BSY/ signal (BSY)
4-38
,
4-40
C_D/ signal (C_D)
4-38
,
4-40
data bus (ADB)
4-28
I_O/ signal (I/O)
4-38
,
4-40
MSG/ signal (MSG)
4-38
,
4-40
REQ/ signal (REQ)
4-38
,
4-40
RST/ signal (RST)
4-29
SEL/ signal (SEL)
4-38
,
4-40
asynchronous SCSI
receive
2-40
send
2-39
B
B_DIFFSENS
3-21
B_GPIO0_FETCH/
3-16
B_GPIO1_MASTER/
3-16
B_GPIO2
3-16
B_GPIO3
3-16
B_GPIO4
3-16
B_SACK+-
3-22
B_SATN+-
3-22
B_SBSY+-
3-22
B_SC_D+-
3-22
B_SD[15:0]+-
3-20
B_SDP[1:0]+-
3-20
B_SI_O+-
3-22
B_SMSG+-
3-22
B_SREQ+-
3-22
B_SRST+-
3-22
B_SSEL+-
3-22
back-to-back read
32-bits address and data
6-26
back-to-back write
32-bit address and data
6-28
base address register
four (BAR4[31:0])
4-11
one
2-4
one (BAR1[31:0])
4-10
three (BAR3[31:0])
4-11
two (BAR2[31:0])
4-10
zero
2-4
zero - I/O (BAR0[31:0])
4-9