
REGISTERDESCRIPTION
(continued)
Index Register9 :
Left DAC Summer Control
7
6
5
4
3
2
1
0
0
0
-
-
-
-
-
-
-MUTLD1 : Resetvalue: 0. Mute leftlineinput #1
of the DAC left summer. Setting this
bit to 0 mutesthe signal.
-MUTLD2 : Resetvalue: 0. Mute leftlineinput #2
of the DAC left summer. Setting this
bit to 0 mutesthe signal.
-MUTLD3 : Resetvalue: 0. Mute leftlineinput #3
of the DAC left summer. Setting this
bit to 0 mutesthe signal.
-MUTLDM : Resetvalue : 0. Mute leftmicrophone
input of the DAC left summer. Setting
this bit to 0 mutes the signal.
-MUTLDP : Reset value : 0. Mute mono input of
the DAC left summer. Setting this bit
to 0 mutesthe signal.
-MUTLDD : Reset value : 0. Mute left DAC signal
into the DAC left summer. This input
is the main left DAC output of the
sigma-delta codec. Setting this bit to
0 mutes the signal.
Index Register10 :
AudioLine Output
AttenuatorControl
4
3
7
6
5
2
1
0
L
L
L
L
R
R
R
R
ROUTG3to
ROUTG0
LOUTG3to
LOUTG0
Refer to the line output attenuator select Table
(Table5) to understandhowthesebitsrelate to the
actualattenuationvalue.
Table 5 :
Line OutputAttenuatorSelect (A1)
: Reset value : 0000.
Right line output gain select.
: Reset value : 0000.
Left line outputgain select.
Bit
Code
0000
0001
0010
0011
0100
0101
0110
0111
Decimal
Gain
(dB)
0
-3
-6
-9
-12
-15
-18
-21
Bit
Code
1000
1001
1010
1011
1100
1101
1110
1111
Decimal
Gain
(dB)
-24
-27
-30
-33
-36
-39
-42
-45
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Index Register 11 :
Audio Output Mute Control
7
6
5
4
3
2
1
0
0
0
0
-
-
-
-
-
-MUTR1 : Reset value : 0. Mute right line output
#1. Settingthisbitto 0mutes theoutput
Pin ROUT1.
-MUTR2 : Reset value : 0. Mute right line output
#2. Settingthisbitto 0mutes theoutput
Pin ROUT2.
-MUTL1 : Resetvalue : 0. Muteleft lineoutput #1.
Settingthis bitto 0 mutestheoutputPin
LOUT1.
-MUTL2 : Resetvalue : 0. Muteleft lineoutput #2.
Settingthis bitto 0 mutestheoutputPin
LOUT2.
-MUTEX: Resetvalue:1 (unmute).Thisbitisread
only
and
toggle/untoggled debounced external
mute.
is
the
output
of
Index Register 12 :
MonoInput/OutputControl
7
6
5
4
3
2
1
0
0
0
0
-
-
-
P
P
PGAIN1,
PGAIN0
: Reset value : 01. Mono input
attenuatorselect (A4). These two bits
select the input attenuation value as
shown in the Table6.
-MUTPCL : Reset value : 0. Mute DAC left into
mono output summer. Setting this bit
to 0 mutes the signal.
-MUTPCR: Reset value : 0. Mute DAC right into
mono output summer. Setting this bit
to 0 mutes the signal.
-MUTPCP : Reset value : 1. Mute mono input into
mono output summer. This bit will
power on to a one (1) so that the PC
system ”beeper” sounds coming into
themonoinputpinwillbeloopedto the
mono output pin so that PC system
soundscanbeheardduringpower-up.
Settingthisbitto0mutesthislooppath.
Table 6 :
MonoInput Attenuator
PGAIN1
PGAIN0
0
0
0
1
1
0
1
1
Gain (A4)
0dB
-10dB
-20dB
-30dB
STLC7549
30/35