參數(shù)資料
型號(hào): STA450A
廠商: 意法半導(dǎo)體
英文描述: XMRADIO SDARS SERVICE LAYER & SOURCE DECODER
中文描述: XMRADIO衛(wèi)星數(shù)字收音機(jī)服務(wù)層
文件頁(yè)數(shù): 6/66頁(yè)
文件大?。?/td> 439K
代理商: STA450A
STA450A
6/66
Note 1. Guaranteed by Design
Note 2. Take into account 200 mV voltage drop in supply lines and Input/Output levels for frequency > 20MHz.
Note 3. Guaranteed by Ipu measurements
Note 4: Performed on all the input pins excluded the pull-down ones
Note 5: Performed on the I/O pins in tristate mode
1.0 FUNCTIONAL DESCRIPTION
1.1 PC BITSTREAM INTERFACE
The STA450A receives a serial data stream from the STA400A Channel Decoder via the PC Bitstream Inter-
face.
Figure 3 shows the stream format outputs from the CDEC (STA400A).
Figure 3. PC Bitstream Interface protocol
Table 1 shows the correspondence between CDEC output clock divider register and the data rate on the bus
Symbol
V
ol
Parameter
Conditions
Min
Typ
Max
0.2
Unit
V
Low level output voltage
2)
Iol = 4mA
V
oh
High level output voltage
2)
Ioh = 4mA
2.8
V
C
IN
Input Capacitance
1)
1.2
pF
C
OUT
Output Capacitance
1)
1.9
pF
C
IO
I/O (BiDir) Capacitance
1)
I/O Latching Current
2.1
pF
I
latchup
V
ESD
200
mA
Electrostatic Protection
Leakage<1
μ
A
4000
V
PCSD
PCDC
PCFS
432ms frame period
CLOCK
TSCC1
TSCC2
PRC_An
PRC_A1
PRC_B1
PRC_Zn
PRC_Z1
PRC_Bn
PCSD
PCDC
PCFS
DC ELECTRICAL CHARACTERISTCS
(continued)
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