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參數(shù)資料
| 型號： | STA450A |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | XMRADIO SDARS SERVICE LAYER & SOURCE DECODER |
| 中文描述： | XMRADIO衛(wèi)星數(shù)字收音機服務(wù)層 |
| 文件頁數(shù)： | 4/66頁 |
| 文件大?。?/td> | 439K |
| 代理商： | STA450A |
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STA450A
4/66
A more detailed description of each pad type can be found in section 4.
Note: After an Hardware reset or power on all Bi Dir pins are configured as inputs.
39
PCFS(FIT_2)
I
PC Bitstream PRC Frame Sync.
Schmitt Trigger Buffer
42,47
NU(USSIO1_DATA)
NU(USSIO2_DATA)
I/O
Not Used (must be connected to
ground in functional mode)
Schmitt Trigger Bi Dir Pad, 4mA
Output Buffer with Slew Rate Control
43,48
NU(USSIO1_SCLK)
NU(USSIO2_SCLK)
I/O
Not Used (must be connected to
ground in functional mode)
Schmitt Trigger Bi Dir Pad, 4mA
Output Buffer with Slew Rate Control
49
NU(GPIO_5)
I/O
Not Used (must be connected to
ground in functional mode)
Bi Dir Pad, 4mA Output Buffer with
Slew Rate Control
54
TEST1
I
Test Pin
Input Pad Buffer with Active Pull-Up
55
RESET_N
I
HW Reset (active low)
Schmitt Trigger Buffer
56
EVENT_IRQ
(GPIO_0)
I/O
General Interrupt (Events, Errors,
Data ready)
Bi Dir Pad, 4mA Output Buffer with
Slew Rate Control
59
SCL
I
I2C Slave Serial Clock
Schmitt Trigger Buffer
60
SDA
I/O
I2C Slave Serial Data
BiDir Pad, 4mA Output Buffer with
Slew Rate Control
61
INT1 (GPIO_1)
I/O
Dedicated Errors Interrupt
Bi Dir Pad, 4mA Output Buffer with
Slew Rate Control
64
INT2 (GPIO_2)
I/O
Dedicates Events Interrupt
Bi Dir Pad, 4mA Output Buffer with
Slew Rate Control
65
TEST (GPIO_3)
I/O
Test Pin
Bi Dir Pad, 4mA Output Buffer with
Slew Rate Control
66
DP_EN
I/O
Data Port Enable
Schmitt Trigger Bi Dir Pad, 4mA
Output Buffer with Slew Rate Control
67
DP_DATA
I/O
Data Port Data
Schmitt Trigger Bi Dir Pad, 4mA
Output Buffer with Slew Rate Control
68
DP_CLK
I/O
Data Port Clock
Schmitt Trigger Bi Dir Pad, 4mA
Output Buffer with Slew Rate Control
72
LRCKT
O
I2S Left&Right Clock
4mA Output Buffer with Slew Rate
Control
73
SDO
O
I2S Output Data (PCM Data)
4mA Output Buffer with Slew Rate
Control
74
SCKT
O
I2S Serial Clock
4mA Output Buffer with Slew Rate
Control
75
OCLK
I/O
Oversampling Clock
Schmitt Trigger BiDir Pad, 4mA
Output Buffer with Slew Rate Control
78
I958_OUT
O
S/PDIF Output
4mA Output Buffer with Slew Rate
Control
79
RS232_TX
O
RS232 Transmitter
4mA Output Buffer with Slew Rate
Control
80
RS232_RX
I
RS232 Receiver (must be
connected to ground in functional
mode)
Schmitt Trigger Buffer
PIN FUNCTION
(continued)
N°
Pin
Type
Function
Pad Description
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