參數(shù)資料
型號(hào): ST52E430B/D
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, UVPROM, 20 MHz, MICROCONTROLLER, CDIP32
封裝: WINDOWED, SHRINK, CERAMIC, DIP-32
文件頁數(shù): 52/120頁
文件大?。?/td> 502K
代理商: ST52E430B/D
37/120
ST52T430/E430
6. I/O PORTS
6.1 Introduction
ST52x430 devices feature flexible individually
programmable multi functional input/output lines.
Refer to the following figure for specific pin
allocations.
23 I/O lines , grouped in 3 different ports, are
available on the ST52x430:
PORT A = 7 or 8-bit ports (PA0 - PA7 pins)
PORT B = 7 or 8-bit ports (PB0 - PB7 pins)
PORT C = 8-bit port. (PC0 - PC7 pins)
The PIN 24 in the SO34 or PIN 22 in the PDIP32
can be configured to belong to the port A or to the
port B.
These I/O lines can be programmed to provide
digital input/output and analog input, or to connect
input/output signals to the on chip peripherals as
alternate pin functions.
The input buffers are TTL compatible with Schmidt
trigger in the port A and C while the port B is CMOS
compatible without Schmidt trigger.
The output buffer is able to supply up to 8 mA.
The port cannot be configured to be at the same
time input and output.
TTL
PORT A PIN
or PORT C PIN
TO INPUT REGISTER
and PERIPHERALS
FROM PERIPHERAL
FROM OUTPUT REGISTER
FROM CONFIGURATION REGISTER
Figure 6.1 PortsA&CFunctional Blocks
Each port is configured by using two configuration
registers. The first is used to define if a pin is an
input or output while the second defines the
Alternate functions.
6.2 Input Mode
The input configuration is selected setting to “1"
the corresponding configuration register bit
(REG_CONF 4, 13 and 15) (see paragraph 6.5) .
The ports are configured by using the
PORT A
PORT B
PORT C
Reg_Conf 4
Reg_Conf 13
Reg_Conf 15
Table 6.1 I/O Port Configuration Registers
configuration registers shown in the following
table.
The digital input data are automatically stored in
the Input Registers, but it is not possible to read
directly the single bit of the IR and it is necessary to
copy the value in a RAM location. The digital data
are stored in a RAM location by using the
assembler instruction:
LDRI RAM_Reg Input_i
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