參數(shù)資料
型號: ST52E430B/D
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, UVPROM, 20 MHz, MICROCONTROLLER, CDIP32
封裝: WINDOWED, SHRINK, CERAMIC, DIP-32
文件頁數(shù): 30/120頁
文件大?。?/td> 502K
代理商: ST52E430B/D
17/120
ST52T430/E430
8 Fuzzy input registers are available for the fuzzy
inferences.
After loading the input values by using the LDFR
assembler instruction, the user can start the fuzzy
inference by using the assembler instruction
FUZZY.
During the fuzzyfication: the input data are
transformed in activation level (alpha weight) of the
Mbfs.
2.4.3 Inference Phase
It manages the alpha weights obtained during the
fuzzyfication phase to compute the truth value (w)
for each rule.
This is a calculation of the maximum (for the OR
operator) and/or minimum (for the AND operator)
Input 1
X1
a1
Input 2
X2
a2
OR = Max
IF INPUT 1 IS X1 OR INPUT 2 IS X2 THEN .......
Input 1
X1
a1
Input 2
X2
a2
IF INPUT 1 IS X1 AND INPUT 2 IS X2 THEN .......
Figure 2.9. Fuzzyfication
performed on alpha values according to the logical
connectives of fuzzy rules.
It is possible to link together several conditions by
linguistic connectives AND/OR, NOT operator and
brackets.
The truth value w and the related output singleton
are passed to the Defuzzyfication phase to
complete the inference calculation.
2.4.4 Defuzzyfication
In this phase the output crisp values are
determined implementing the consequent part of
the rules.
Each consequent Singleton Xi is multiplied by its
weight values wi, calculated by the Fuzzy Inference
Unit in order to compute the upper part of the
defuzzification.
Each output value is deduced from the
consequent crisp values (Xi) by using the
defuzzification formula:
Y
X
i
ij
j
N
ij
j
N
=
w
where:
i = 0,1 identifies the current output variable
N = number of the active rules on the current
output
1
i-th OUTPUT
VARIABLE
0
X
ij
X
i0
X
in
w
i0
w
ij
w
in
j-th Singleton
Figure 2.10 Output Membership Functions.
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