參數(shù)資料
型號(hào)： SST89C58-33-I-TQJE
廠商： SILICON STORAGE TECHNOLOGY INC
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP44
封裝： LEAD FREE, TQFP-44
文件頁(yè)數(shù)： 20/52頁(yè)
文件大?。?/td> 967K
代理商： SST89C58-33-I-TQJE
Data Sheet
FlashFlex51 MCU
SST89C54 / SST89C58
27
2004 Silicon Storage Technology, Inc.
S71131-04-000
6/04
4.2.5 Interrupt Termination
If interrupt termination is selected, (SFCM[7] is set), then an interrupt (INT1) will be generated to indicate flash
operation completion. Under this condition, the INT1 becomes an internal interrupt source. The INT1# pin can now
be used as a general purpose port pin and it cannot be a source of External Interrupt 1.
For an interrupt to occur, EX1 and EA bits of IE register must be set. The IT1 bit of TCON register must also be set
for edge trigger detection.
Important: The user cannot program Security/Re-Map bits while code is running in Block 1. The user can only pro-
gram security SBx/Re-Map bits when code is running in external code memory or when code is running in Block 0.
The solution is to use MOV SFAH, #80H; before issuing any IAP commands to program security bits or Re-Map bits.
5.0 TIMERS/COUNTERS
The SST89C54/58 have three 16-bit registers that can be used as either timers or event counters. The three Tim-
ers/Counters are the Timer 0 (T0), Timer 1 (T1), and Timer 2 (T2). Each is designated with a pair of 8-bit registers
in the SFRS. The pair consists of a most significant (high) byte and least significant (low) byte. The respective reg-
isters are TL0, TH0, TL1, TH1, TL2, and TH2.
TABLE
4-3: IN-APPLICATION PROGRAMMING MODE COMMANDS
Operation
SFAH [7:0]
SFAL [7:0]
SFDT [7:0]
SFCM [6:0]1
1. Interrupt/Polling enable for flash operation completion
SFCM[7] = 1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
Chip-Erase
X
55H
01H
Block-Erase
AH2
2. SFAH[7] = 0 selects Block 0 for SST89C58; SFAH[7:6] = 00 selects Block 0 for SST89C54; SFAH[7:4] = FH selects Block 1
X = Don’t Care; AL = Address low order byte; AH = Address high order byte; DI = Data Input; DO = Data Output
All other values are in hex.
SFCF[6] = 1 enables IAP command. SFCF[6] = 0 disables IAP command.
X
55H
0DH
Sector-Erase
AH
AL
X
0BH
Byte-Program
AH
AL
DI
0EH
Burst-Program
AH
AL
DI
06H
Byte-Verify (Read)
AH
AL
DO
0CH
Prog-SB3
80H
X
55H
05H
Prog-SB2
80H
X
55H
03H
Prog-SB1
80H
X
55H
0FH
Prog-RB1
80H
X
55H
09H
Prog-RB0
80H
X
55H
08H
T4-3.4 1131
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