參數(shù)資料
型號: SAH-C515A-4R
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PQFP80
封裝: METRIC, PLASTIC, QFP-80
文件頁數(shù): 53/182頁
文件大?。?/td> 1917K
代理商: SAH-C515A-4R
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Semiconductor Group
8-8
1997-08-01
Fail Safe Mechanisms
C515A
software to examine error conditions detected by the Watchdog Timer even if meanwhile an
oscillator failure occured.
The oscillator watchdog is able to detect a recovery of the on-chip oscillator after a failure. If the
frequency derived from the on-chip oscillator is again higher than the reference the watchdog starts
a final reset sequence which takes typ. 1 ms. Within that time the clock is still supplied by the RC
oscillator and the part is held in reset. This allows a reliable stabilization of the on chip oscillator.
After that, the watchdog toggles the clock supply back to the on-chip oscillator and releases the
reset request. If no
reset is applied in this moment the part will start program execution. If an
external reset is active, however, the device will keep the reset state until also the external reset
request disappears.
Furthermore, the status flag OWDS is set if the oscillator watchdog was active. The status flag can
be evaluated by software to detect that a reset was caused by the oscillator watchdog. The flag
OWDS can be set or cleared by software. An external reset request, however, also resets OWDS
(and WDTS).
If software power-down mode is activated the RC oscillator and the on-chip oscillator is stopped.
Both oscillators are again started in power-down mode when a low level is detected at the P3.2/
INT0 input pin and when bit EWPD in SFR PCON1 is set (wake-up from power-down mode
enabled). After the start-up phase of the watchdog circuitry in power-down mode, a power-down
mode wake-up interrupt is generated (instead of an internal reset). Detailed description of the wake-
up from software power-down mode is given in section 9.4.2.
Special Function Register IP0 (Address A9H)
Reset Value : 00H
The shaded bits are not used for fail save control.
Bit
Function
OWDS
Oscillator Watchdog Timer Status Flag.
Set by hardware when an oscillator watchdog reset occured. Can be
set and cleared by software.
OWDS WDTS
IP0.5
IP0.4
A9H
IP0
IP0.3
IP0.2
IP0.1
IP0.0
MSB
LSB
Bit No.
76543210
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