
18 UART
S1C17003 TECHNICAL MANUAL
EPSON
18-1
UART
18 UART
18.1 UART Configuration
The S1C17003 includes dual channel UART. The UART transfers data asynchronously with external serial devices
at a rate of 150 to 460800bps. It includes 2-byte receive data buffer and one-byte transmit data buffer enabling
full-duplex communication. For the transfer clock, either a clock internally generated by the timer module or an
external clock input via the SCLKx can be used. Software should be used to select the data length (7 or 8 bits),
stop bit length (1 or 2 bits) and parity mode (even, odd, or no parity). The start bit is fixed to 1 bit. Overrun errors,
flaming errors and parity errors are detectable during data reception. The UART generates 3 types of interrupts,
i.e., transmit buffer empty, receive buffer full, and receive error for each channel, enabling the interrupt handling to
process serial data transfer efficiently.
This UART module also incorporates an RZI modulation/demodulation circuit that enables IrDA 1.0-compatible
infrared communications simply by adding basic external circuits.
Figure 18.1.1 illustrates the UART configuration.
Shift register
Receive data
buffer (2 bytes)
Ch.0: SIN0 (P12)
Ch.1: SIN1 (P30)
sclk
Internal bus
ITC
UART Ch.x
Bus I/F
and
control
register
Ch.0: SCLK0 (P10)
Ch.1: SCLK1 (P16)
Shift register
Transmit data
buffer (1 byte)
Clock/transfer control
Ch.0: SOUT0 (P11)
Ch.1: SOUT1 (P27)
RZI demodulation
circuit
RZI modulation
circuit
Interrupt
control
Ch.0: from 8-bit timer Ch.0
Ch.1: from 8-bit timer Ch.1
Figure 18.1.1: UART configuration
Note: The UART modules for the two channels have the same functions except for control register
addresses. For this reason, the description in this section applies to all UART channels. The “x”
in the register name indicates the channel number (0 or 1). Register addresses are indicated
either as Ch.0” or “Ch.1”.
E.g.: UART_CTLx register (0x4104/0x4124)
Ch.0:UART_CTL0 register (0x4104)
Ch.1:UART_CTL1 register (0x4124)