
1 Overview
S1C17003 TECHNICAL MANUAL
EPSON
1-9
Overview
PAD/Pin/Ball No.
Name
I/O
Default
status
Function (Default/Shared by setting)
CHIP
TQFP
WCSP
2
36
2
VSS
-
Power supply ( )
52
37
G5
OSC3
I
OSC3 oscillator input6
-
38
-
-NC
-
2
39
2
VSS
-
Power supply ( )
55
40
G4
OSC4
O
OSC3 oscillator output
2
41
2
VSS
-
Power supply ( )
58
42
F4
P04/SPICLK
I/O
I(Pull-UP) I/O common port (with inturrupt)1/SPI clock I/O
59
43
G3
P05/SDO
I/O
I(Pull-UP) I/O common port (with inturrupt)1/SPI data output
4
44
4
HVDD
-
I/O Power supply (+)
61
45
F3
P06/SDI
I/O
I(Pull-UP) I/O common port (with inturrupt)1/SPI data input
62
46
G2
P07/#SPISS
I/O
I(Pull-UP) I/O common port (with inturrupt)1/SPI slave select input
-
47
-
-NC
-
3
48
3
LVDD
-
Core power supply (+)
67
49
G1
P10/SCLK
I/O
I(Pull-UP) I/O common port (with inturrupt)1/UART Ch0 clock input
3
50
3
LVDD
-
Core power supply (+)
71
51
F1
P11/SOUT
I/O
I(Pull-UP) I/O common port (with inturrupt)1/UART Ch0 data output
72
52
E3
P12/SIN
I/O
I(Pull-UP) I/O common port (with inturrupt)1/UART Ch0 data input
73
53
E2
P13/EXCL1
I/O
I(Pull-UP) I/O common port (with inturrupt)1/T16 Ch1 external clock input
74
54
E1
P14/EXCL2
I/O
I(Pull-UP) I/O common port (with inturrupt)1/T16 Ch2 external clock input
4
55
4
HVDD
-
I/O Power supply (+)
2
56
2
VSS
-
Power supply ( )
77
57
D1
P15/EXCL3
I/O
I(Pull-UP) I/O common port (with inturrupt)1/T16E Ch0 external clock input
79
58
D2
P16/SCLK1
I/O
I(Pull-UP) I/O common port (with inturrupt)1/UART Ch1 clock input
-
59
-
-NC
-
5
60
D3
AVDD
-
Analog power supply (+)
83
61
C1
P17/AIN3
I
I/O common port (with inturrupt)1/ A/D converter Ch3 input
84
62
C2
P20/AIN2
I
I/O common port1/ A/D converter Ch2 input
86
63
B1
P21/AIN1
I
I/O common port1/ A/D converter Ch1 input
87
64
B2
P22/AIN0
I
I/O common port1/ A/D converter Ch0 input
1: Default function settings
2: VSS PAD numbers : 2, 3, 20, 21, 27, 28, 43, 44, 47, 48, 51, 54, 56, 76 78
VSS ball numbers : C6, D4, F5
3: LVDD PAD numbers : 8, 9, 31, 34, 35, 64, 69, 70
LVDD ball numbers : D5, F2
4: HVDD PAD numbers : 10, 11, 17, 29, 60, 75
HVDD ball numbers : C4, E4
5: AVDD PAD numbers : 80, 82, 85
6: When an external clock is input to the OSC3 or OSC1 pin, the clock signal level must be LVDD.
Note: Do not put bonding on NC pins. (The pins for which “NC” is specified for TQFP, and no number is
described for CHIP/WCSP.)