參數(shù)資料
型號(hào)： QSMRM
英文描述： QSMRM QSM Queued Serial Module Reference Manual
中文描述： QSMRM QSM排隊(duì)串行模塊參考手冊(cè)
文件頁(yè)數(shù)： 3/112頁(yè)
文件大?。?/td> 1496K
代理商： QSMRM
QSM
REFERENCE MANUAL
MOTOROLA
iii
Paragraph
Title
Page
SECTION 1
FUNCTIONAL OVERVIEW
1.1
1.2
Block Diagram ...........................................................................................1-1
Memory Map .............................................................................................1-2
SECTION 2
SIGNAL DESCRIPTIONS
2.1
2.1.1
2.1.2
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
SCI Pins ....................................................................................................2-1
RXD — Receive Data ........................................................................2-1
TXD — Transmit Data .......................................................................2-1
QSPI Pins ..................................................................................................2-2
PCS[3:0] — Peripheral Chip-Selects .................................................2-2
SS — Slave Select ............................................................................2-2
SCK — QSPI Serial Clock .................................................................2-2
MISO — Master In Slave Out ............................................................2-2
MOSI — Master Out Slave In ............................................................2-2
SECTION 3
CONFIGURATION AND CONTROL
3.1
3.2
3.2.1
3.2.2
3.2.3
3.2.4
3.3
3.3.1
3.3.2
3.3.3
Overall QSM Configuration Summary .......................................................3-4
QSM Global Registers ...............................................................................3-6
QSM Configuration Register (QSMCR) .............................................3-6
QSM Test Register (QTEST) ............................................................3-7
QSM Interrupt Level Register (QILR) ................................................3-8
QSM Interrupt Vector Register (QIVR) ..............................................3-8
QSM Pin Control Registers .......................................................................3-9
QSM Port Data Register (PORTQS) .................................................3-9
QSM Pin Assignment Register (PQSPAR) .....................................3-10
QSM Data Direction Register (DDRQS) ..........................................3-10
SECTION 4
QSPI SUBMODULE
4.1
4.1.1
4.1.2
4.1.3
4.1.4
4.1.5
Features ....................................................................................................4-1
Programmable Queue .......................................................................4-1
Programmable Peripheral Chip-Selects ............................................4-2
Wraparound Transfer Mode ..............................................................4-2
Programmable Transfer Length ........................................................4-2
Programmable Transfer Delay ..........................................................4-2
TABLE OF CONTENTS
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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