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參數(shù)資料
| 型號： | QSMRM |
| 英文描述： | QSMRM QSM Queued Serial Module Reference Manual |
| 中文描述： | QSMRM QSM排隊(duì)串行模塊參考手冊 |
| 文件頁數(shù)： | 24/112頁 |
| 文件大小： | 1496K |
| 代理商： | QSMRM |
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MOTOROLA
3-8
CONFIGURATION AND CONTROL
QSM
REFERENCE MANUAL
TSBD — SPI Test Scan Path Select
1 = Enable delay to SCK scan path
0 = Enable SPI baud clock scan path
SYNC — SCI Baud Clock Synchronization Signal
1 = Inhibit SCI source signal (QCSCI1)
0 = Activate SCI source signal
TQSM — QSM Test Enable
1 = Enable QSM to send test scan paths
0 = Disable scan path
TMM — Test Memory Map
1 = QSM responds to test memory addresses
0 = QSM responds to QSM memory addresses
3.2.3 QSM Interrupt Level Register (QILR)
The QILR determines the priority level of interrupts requested by the QSM and the vec-
tor used when acknowledging an interrupt. Separate fields exist to hold the interrupt
levels for the QSPI and the SCI submodules. Priority is used to determine which inter-
rupt is serviced first when two or more modules or external peripherals simultaneously
request an interrupt. This register may be accessed only when the CPU is in supervi-
sor mode.
* QIVR — QSM Interrupt Vector Register
ILQSPI — Interrupt Level for QSPI
ILQSPI determines the priority level of all QSPI interrupts. This field should be pro-
grammed to a value between $0 (interrupts disabled) and $7 (highest priority). If both
the QSPI and the SCI modules contain the same priority level (not equal to zero) and
both modules simultaneously request interrupt servicing, the QSPI is given priority.
ILSCI — Interrupt Level of SCI
ILSCI determines the priority level of all SCI interrupts. This field should be pro-
grammed to a value between $0 (interrupts disabled) and $7 (highest priority).
3.2.4 QSM Interrupt Vector Register (QIVR)
At reset, QIVR is initialized to $0F, which corresponds to the uninitialized interrupt vec-
tor in the exception table. This vector is selected until QIVR is written. QIVR should be
programmed to one of the user-defined vectors ($40-$FF) during initialization of the
QSM.
QILR
— QSM Interrupt Level Register
$YFFC04
15
14
13
12
11
10
9
8
7
0
0
0
ILQSPI
ILSCI
QIVR*
RESET:
0
0
0
0
0
0
0
0
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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