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參數(shù)資料
| 型號： | QSMRM |
| 英文描述： | QSMRM QSM Queued Serial Module Reference Manual |
| 中文描述： | QSMRM QSM排隊串行模塊參考手冊 |
| 文件頁數(shù)： | 110/112頁 |
| 文件大?。?/td> | 1496K |
| 代理商： | QSMRM |
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MOTOROLA
I-2
INDEX
QSM
REFERENCE MANUAL
B-6
Master Mode 1-1, 4-24
Master Mode Operation 4-24
Master Out Slave In (MOSI) 2-1, 2-2, 3-10, 3-11, 4-24,
4-26, B-6, B-7
Master Wraparound 4-25
Master/Slave Mode Select (MSTR) 4-4, 4-16, 4-24, 4-27,
B-7
MCR 3-1
MISO 2-1, 2-2, 3-10, 3-11, 4-26, B-6
Mode Fault Flag (MODF) 3-5, 4-7, 4-9, 4-11, 4-12, 4-24,
B-10
Mode Select (M) 3-5, 5-7
MODF 3-5, 4-7, 4-9, 4-11, 4-12, 4-24, B-10
MOSI 2-1, 2-2, 3-10, 3-11, 4-24, 4-26, B-6, B-7
MSTR 4-4, 4-16, 4-24, 4-27, B-7
–N–
New Queue Pointer Value (NEWQP) 3-5, 4-8, 4-9, 4-10,
4-16, 4-25, 4-27, B-9
NEWQP 3-5, 4-8, 4-9, 4-10, 4-16, 4-25, 4-27, B-9
NF 5-11, 5-21
Noise 5-19
Noise Error Flag (NF) 5-11, 5-21
Noise Flag 5-17
Not Implemented 4-9
NRZ 5-13
–O–
Operating Modes 4-16
Overrun Error Flag (OR) 5-11, 5-21, B-5
–P–
Parity Enable (PE) 3-5, 5-7, 5-15
Parity Error Flag (PF) 5-11, 5-12, 5-21, B-5
Parity Generation 5-15
Parity Type (PT) 3-5, 5-7
PCS 4-15
PCS pins 4-15
PCS to SCK Delay (DSCK) 3-5, 4-7, 4-16, 4-25, 4-28,
B-11
PCS3
0/SS 4-7, 4-11, 4-12, 4-14, 4-24, 4-26, 4-27, 4-28
PCS3-PCS0/SS 2-1, 2-2, 3-10, 3-11, B-11
PE 3-5, 5-7, 5-15
Peripheral Chip-Select 3-0/Slave Select (PCS3
O/SS) 4-7, 4-11, 4-12, 4-14, 4-24, 4-26, 4-27, 4-28
Peripheral Chip-Select 3-0/Slave Select (PCS3-PC-
SO/SS) 2-1, 2-2, 3-10, 3-11, B-11
Peripheral Chip-Selects 4-2
PF 5-11, 5-12, 5-21, B-5
PORTQS 4-12, 4-15
PQSPAR 4-15, 4-24, 4-26
Programmable Queue 4-1
PT 3-5, 5-7
–Q–
QDDR 2-1, 3-5, 3-10, 5-14, 5-15
QILR 3-4, 3-8
QIVR 3-4, 3-8
QMCR 1-3, 3-4, 3-6
QPAR 2-1, 3-5, 3-10
QPDR 2-1, 3-5, 3-9, 5-14, 5-15
QSM 4-4
QSM Configuration 3-4
QSM Configuration Register (QMCR) 1-3, 3-4, 3-6
QSM Data Direction Register (DDRQS) 4-12, 4-24, 4-26
QSM Data Direction Register (QDDR) 2-1, 3-5, 3-10,
5-14, 5-15
QSM Global Registers 1-3, 3-6
QSM Interrupt Level Register (QILR) 3-4, 3-8
QSM Interrupt Vector Register (QIVR) 3-4, 3-8
QSM Memory Map 1-2
QSM Pin Assignment Register (PQSPAR) 4-15, 4-24,
4-26
QSM Pin Assignment Register (QPAR) 2-1, 3-5, 3-10
QSM Pin Control Registers 3-9
QSM Port Data Register (PORTQS) 4-12, 4-15
QSM Port Data Register (QPDR) 2-1, 3-5, 3-9, 5-14, 5-15
QSM Test Enable (TQSM) 3-8, B-2
QSM Test Register (QTEST) 3-7, B-2
QSPI Block Diagram 4-3
QSPI Control Register 0 (SPCR0) 2-1, 3-5, 4-4, 4-16
QSPI Control Register 1 (SPCR1) 3-5, 4-4, 4-6, 4-24
QSPI Control Register 2 (SPCR2) 3-5, 4-4, 4-8, 4-10,
4-11, 4-14, 4-16, 4-25, 4-28
QSPI Control Register 3 (SPCR3) 3-5, 4-10
QSPI Enable (SPE) 3-5, 4-4, 4-7, 4-12, 4-25, 4-26, 4-27,
4-28, B-8
QSPI Finished Flag (SPIF) 3-5, 4-9, 4-11, 4-27, 4-28,
B-10
QSPI Initialization Operation 4-18
QSPI Loop Mode (LOOPQ) 3-5, 4-10, B-10
QSPI Master Operation 4-19, 4-20, 4-21
QSPI Pins 2-2
QSPI Programmer's Model and Registers 4-3
QSPI RAM 1-2, 1-3, 4-7, 4-9, 4-12, 4-15, 4-16, 4-17
QSPI Registers 4-4
QSPI Slave Operation 4-22, 4-23
QSPI Status Register (SPSR) 4-11, 4-12, 4-13, 4-16,
4-25, 4-28
QSPI SUBMODULE 4-1
QSPI Submodule Diagram 4-3
QTEST 3-7, B-2
Queue Pointer 4-2
–R–
R0-R7/T0-T7 5-13
R8/T8 5-12
RAF 5-11, B-5
RDR 5-10, 5-11, 5-12, 5-16, 5-20
RDRF 5-10, 5-17, 5-20, 5-21, B-5
RE 3-5, 5-2, 5-9, 5-16, 5-20, B-4
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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