參數(shù)資料
型號(hào): PSD4235G2-A-20UI
廠商: STMICROELECTRONICS
元件分類: 微控制器/微處理器
英文描述: 4M X 1 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝: PLASTIC, TQFP-80
文件頁(yè)數(shù): 38/104頁(yè)
文件大?。?/td> 1114K
代理商: PSD4235G2-A-20UI
Obsolete
Product(s)
- Obsolete
Product(s)
PSD4135G2, PSD4135G2V
Memory blocks delailed operation
Doc ID 7838 Rev 2
Figure 7.
Data toggle flowchart
7.1.7
Unlock Bypass
The unlock bypass feature allows the system to program words to the Flash memories faster
than using the standard program instruction. The unlock bypass instruction is initiated by
first writing two unlock cycles. This is followed by a third write cycle containing the unlock
bypass command, 20h (see Table 22). The Flash memory then enters the unlock bypass
mode. A two-cycle Unlock Bypass Program instruction is all that is required to program in
this mode. The first cycle in this instruction contains the unlock bypass programm
command, A0h; the second cycle contains the program address and data.
Additional data is programmed in the same manner. This mode dispenses with the initial two
unlock cycles required in the standard program instruction, resulting in faster total
programming time. During the unlock bypass mode, only the Unlock Bypass Program and
Unlock Bypass Reset instructions are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset instruction. The first cycle must contain the
START
READ DQ6
(DQ14)
AI04921
No
Yes
No
Yes
Program
or Erase
Cycle failed
Program
or Erase
Cycle is
complete
Issue RESET
instruction
READ DQ5 and DQ6
(DQ13 and DQ14)
at Valid Even Address
DQ5
(DQ13)
= 1
DQ6
(DQ14)
=
Toggle
DQ6
(DQ14)
=
Toggle
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