參數(shù)資料
型號： PSD4235G2-A-20UI
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： 4M X 1 FLASH, 52 I/O, PIA-GENERAL PURPOSE, PQFP80
封裝： PLASTIC, TQFP-80
文件頁數(shù)： 37/104頁
文件大小： 1114K
代理商： PSD4235G2-A-20UI
Obsolete
Product(s)
- Obsolete
Product(s)
Memory blocks delailed operation
PSD4135G2, PSD4135G2V
Doc ID 7838 Rev 2
Data toggle
Checking the Data Toggle bit on DQ6 (DQ14) is a method of determining whether a
Program or Erase instruction is in progress or has completed. Figure 7 shows the Data
Toggle algorithm.
When the MCU issues a programming instruction, the embedded algorithm within the
PSD4135G2G2V begins. The MCU then reads the location to be programmed in Flash to
check status. Data bit DQ6 (DQ14) of this location will toggle each time the MCU reads this
location until the embedded algorithm is complete. The MCU continues to read this location,
checking DQ6 (DQ14) and monitoring the Error bit on DQ5 (DQ13) . When DQ6 (DQ14)
stops toggling (two consecutive reads yield the same value), and the Error bit on DQ5
(DQ13) remains ‘0’, then the embedded algorithm is complete. If the Error bit on DQ5
(DQ13) is ‘1’, the MCU should test DQ6 (DQ14) again, since DQ6 (DQ14) may have
changed simultaneously with DQ5 (DQ13) (see Figure 7).
The Error bit at DQ5 (DQ13) will be set if either an internal timeout occurred while the
embedded algorithm attempted to program, or if the MCU attempted to program a ‘1’ to a bit
that was not erased (not erased is logic ‘0’).
It is suggested (as with all Flash memories) to read the location again after the embedded
programming algorithm has completed to compare the word that was written to Flash with
the word that was intended to be written.
When using the Data Toggle method after an erase instructin, Figure 7 still applies. DQ6
(DQ14) will toggle until the erase operation is complete. A ‘1’ on DQ5 (DQ13) will indicate a
timeout failure of the erase operation, a ‘0’ indicates no error. The MCU can read any even
location within the sector being erased to get DQ6 (DQ14) and DQ5 (DQ13) .
PSDsoft generates ANSI C code functions which implement these Data Toggling algorithms.
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PSD813F2A-15JI 128K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
PSD834F2VA-15MI 256K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
PSD854F2A-90MT 256K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52
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相關代理商/技術參數(shù)
參數(shù)描述
PSD4235G2V-12UI 功能描述:CPLD - 復雜可編程邏輯器件 3.3V 4M 120ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4235G2V-90U 功能描述:CPLD - 復雜可編程邏輯器件 3.3V 4M 90ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4256G6V-10UI 功能描述:CPLD - 復雜可編程邏輯器件 3.3V 8M 100ns RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
PSD4-36 制造商:Tamura Corporation of America 功能描述:
PSD-45 制造商:MEANWELL 制造商全稱:Mean Well Enterprises Co., Ltd. 功能描述:45W DC-DC Single Output Switching Power Supply
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