參數(shù)資料
型號(hào)： PNX8526
廠商： NXP Semiconductors N.V.
英文描述： Programmable source decoder with integrated peripherals
中文描述： 可編程集成外設(shè)源解碼器
文件頁(yè)數(shù)： 38/59頁(yè)
文件大?。?/td> 3319K
代理商： PNX8526
Philips Semiconductors
PNX8526
Programmable Source Decoder with Integrated Peripherals
Preliminary data
Rev. 01 – 6 October 2003
38 of 59
9397 750 11715
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
For MPEG2 video, a slice level HL MPEG2 video decoder performs the majority of the
MPEG2 algorithm. This MPEG decoder is capable of full-resolution decoding. The
TM32 CPU does all MPEG2 processing above the slice level. Two simultaneous SD
streams or one HD stream may be processed.
All audio processing is done by the TM32 CPU. Compressed audio will be present in
memory from either the transport stream de-multiplex or from the SPDIF input port.
The SPDIF input port is intended primarily for DTV applications where a SPDIF
source is available from an external source device, such as a DVD player. PCM
(stereo sample) audio is present in memory from the I
2
S input ports or SPDIF input.
Two AC-3 (or equivalent) compressed audio streams may be decoded
simultaneously. The TM32 CPU may also process effects, enhancements and mix the
audio data. Multi-channel compressed audio or down-mixed stereo PCM audio is
transmitted over the SPDIF output interface. Multi-channel audio samples are Dolby
Pro Logic down-mixed into the two stereo I
2
S interfaces to the PNX8510
companion IC. In addition to the two I
2
S inputs and two I
2
S outputs, a bi-directional
I
2
S interface is provided. This allows connection of other audio inputs or
outputs– headphones, for example. Note that there is not enough compute power to
support encoding of multi-channel compressed audio simultaneous with video
processing. So the multi-channel compressed audio transmitted over SPDIF must be
from one of the original compressed sources.
Graphics rendering may be accomplished with the MIPS or the TM32 CPU by utilizing
the 2D Drawing and DMA engine. This engine can perform fast area fills, 3-operand
bitblt, monochrome data expansion, and lines. It can also be used as a generic DMA
engine to transfer data between memory locations on a byte-aligned basis. An alpha
bitblt capability is also provided to allow for anti-aliased text and lines as well as
source/destination blending operations.
Once all video and graphics data for specific fields or frames has been generated in
memory, the video display pipeline starts processing those images for display. The
video processing functions include 6-tap horizontal/vertical scaling, anti-flicker
filtering, and de-interlacing (when progressive output is required). The processed
images are then combined for each output. Up to four surfaces of any supported
format may be combined to produce the primary display output. Up to two surfaces
are combined to produce the secondary output. Compositing of more surfaces for
future video algorithms is possible by using the TM32 CPU and/or the memory based
scaler prior to invoking the compositing/display engine. This is subject to CPU and
memory bandwidth availability.
The PNX8526 contains a 1394 interface with 5C copy protection. The PNX8526 1394
can simultaneously transmit two transport streams while receiving one transport
stream. The transmitted streams can be partial transport streams (created by PID
filtering of an input) or one of the two streams can be software generated. In the case
of receiving a scrambled 1394 transport stream input, the stream can either use the
on-chip de-scramblers, or may be routed to the external companion CA IC for
de-scrambling by the POD/CI CA module(s).
The PNX8526 contains a variety of peripheral interfaces to support both ASTB and
DTV requirements. There are two Smartcard interfaces, two USB ports, two I
2
C
ports, one IrDA Data UART and two general purpose UARTs, one of which (UART3)
is multiplexed with an SSI interface for soft modem support. The PNX8526 also
contains an integrated IDE controller, which only requires an external isolation buffer
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