參數(shù)資料
型號： PNX8526
廠商： NXP Semiconductors N.V.
英文描述： Programmable source decoder with integrated peripherals
中文描述： 可編程集成外設源解碼器
文件頁數(shù)： 37/59頁
文件大?。?/td> 3319K
代理商： PNX8526
Philips Semiconductors
PNX8526
Programmable Source Decoder with Integrated Peripherals
Preliminary data
Rev. 01 – 6 October 2003
37 of 59
9397 750 11715
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
[1]
[2]
*These pins are included in the XIO set. Refer to
PNX8526 User Manual, Chapter 8
for additional functions.
**The ICAM1_SETVPP and ICAM1_C8 signals are automatically selected when the ICAM function is selected. Refer to
Table 18
(Offset
0x04 D600 IO_MUX_CTR). Selecting GPIO mode will disable this ICAM functionality.
7.
Functional description
Figure 3
shows a block diagram of a typical PNX8526-based system. The system
shown is a “standalone system” which uses the internal MIPS host.
The PNX8526 runs on a single 27 MHz xtal from which all internal and external
clocks are derived by on-chip synthesizers. The PNX8526 boots directly from
attached Flash memory or ROM. If desired, custom boot methods can be
programmed using the optional I
2
C boot EEPROM.
The PNX8526 has three Digital Video inputs that accept digitized analog video
(ITU-656), although only two ITU-656 streams can be processed simultaneously. Two
of these inputs, DV2 and DV3, can also accept scrambled transport streams.
The DV inputs support parallel transport stream formats. In addition, a single
incoming 1394 transport stream is supported. Two selected transport streams can
undergo internal de-scrambling and decoding.
Based on the system implementation, one or both transport streams may pass
through Point of Deployment (POD) or Common Interface (CI) conditional access
modules before transfer into the PNX8526. Either a single companion IC, such as the
SCM Microsystems CIMaX, or two CIMaX chips can be used. In the latter case, it
is possible to handle dual decoding no matter which conditional access system is
used.
The PNX8526 contains on-chip DVB, MULTI2 and DES hardware de-scramblers, as
well as an ICAM verifier. The entitlement system for these de-scramblers is provided
via two Smartcard interfaces.
The TM32 CPU does further processing on the result of the transport stream de-mux.
R25
SC1_OFFN
ICAM1_DETECT
SC1_CMD
ICAM1_SETVCC
SC1_RST
ICAM1_RESET
SC1_SCCK
ICAM1_CLK
SC1_DA
ICAM1_C7
I
I
O
O
O
O
O
O
I/O
I/O
Smartcard Off
ICAM1 Detect
Smartcard Command
ICAM1 VCC
Smartcard Reset
ICAM1 Reset
Smartcard Clock
ICAM1 Clock
Smartcard1 Data
ICAM1 C7
R23
R24
R26
T26
Table 17:
In this table,”Type” reflects mux pin function only. A pin may have other “Type” capabilities as noted in its functional group. See
Section 6.2
for more details.
Pin
MUX contacts Primary
signal and Alternate
Function
Multiplexed (MUX) pins
…continued
Type
Description
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