Philips Semiconductors
PNX8526
Programmable Source Decoder with Integrated Peripherals
Preliminary data
Rev. 01 – 6 October 2003
31 of 59
9397 750 11715
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
T1
DV_OUT2[6]
SPY_OUT[6]
DSU_PCST1[2]
DV_OUT2[5]
SPY_OUT[5]
DSU_PCST1[1]
DV_OUT2[4]
SPY_OUT[4]
DSU_PCST1[0]
DV_OUT2[3]
SPY_OUT[3]
DSU_PCST0[2]
DV_OUT2[2]
SPY_OUT[2]
DSU_PCST0[1]
DV_OUT2[1]
SPY_OUT[1]
DSU_PCST0[0]
DV_OUT2[0]
SPY_OUT[0]
DSU_CLK
I2S_OUT2_OSCLK
DV_OUT[20]
SPY_OUT[11]
I2S_OUT2_SCK
DV_OUT[21]
SPY_OUT[10]
I2S_OUT2_WS
DV_OUT[22]
DBG_EXT_STOP
I2S_OUT2_SD
DV_OUT[23]
CLK_SPY
DV1_DATA[9]
GPIO 42
DV1_DATA[8]
GPIO 41
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I/O
O
O
I/O
O
I
O
O
O
I
I/O
I
I/O
Digital Video Output2, Bit 6 for secondary display channel from AICP
SPY Micro-Architecture Output signal, Bit 6
Program Counter Status1, Bit 2
Digital Video Output2, Bit 5 for secondary display channel from AICP
SPY Micro-Architecture Output signal, Bit 5
Program Counter Status1, Bit 1
Digital Video Output2, Bit 4 for secondary display channel from AICP
SPY Micro-Architecture Output signal, Bit 4
Program Counter Status1, Bit 0
Digital Video Output2, Bit 3 for secondary display channel from AICP
SPY Micro-Architecture Output signal, Bit 3
Program Counter Status0, Bit 2
Digital Video Output2, Bit 2 for secondary display channel from AICP
SPY Micro-Architecture Output signal, Bit 2
Program Counter Status0, Bit 1
Digital Video Output2, Bit 1 for secondary display channel from AICP
SPY Micro-Architecture Output signal, Bit 1
Program Counter Status0, Bit 0
Digital Video Output2, Bit 0 for secondary display channel from AICP
SPY Micro-Architecture Output signal, Bit 0
Debug Support Unit Clock
Audio OUT2 Oversample Clock
AICP RGB Data Bit 20
SPY Micro-Architecture Output signal, Bit 11
Audio OUT2 Serial Clock
AICP RGB Data Bit 21
SPY Micro-Architecture Output signal, Bit 10
Audio OUT2 Word Select
AICP RGB Data Bit 22
External Stop Request signal
Audio OUT2 Data
AICP RGB Data Bit 23 (Most Significant Bit)
SPY Micro-Architecture Clock Output signal
ITU-656 VIP Data Bit 9 (Most Significant Bit)
General Purpose Input/Output 42
ITU-656 VIP Data Bit 8
General Purpose Input/Output 41
T2
T3
U1
T4
U2
U3
K2
L3
K1
L4
AE17
AD17
Table 17:
In this table,”Type” reflects mux pin function only. A pin may have other “Type” capabilities as noted in its functional group. See
Section 6.2
for more details.
Pin
MUX contacts Primary
signal and Alternate
Function
Multiplexed (MUX) pins
…continued
Type
Description