PNX1300/01/02/11 Data Book
Philips Semiconductors
4-2
PRELIMINARY SPECIFICATION
ing the result(s) in the destination register. Otherwise,
their naming follows the rules given above where appro-
priate. For example, the dspuquadaddui operation imple-
ments four 8-bit additions; it treats the first operand of
each addition as unsigned, the second operand as
signed, and produces an unsigned result for each addi-
tion. Each result, which is computed with no loss of pre-
cision, is clipped into the representable range of a byte
(0..255).
Table 4-1. Key Multimedia Custom Operations Listed
by Function Type
Function
Custom Op
Description
DSP
absolute
value
dspiabs
Clipped signed 32-bit absolute
value
Dual clipped absolute values of
signed 16-bit halfwords
dual-16 arithmetic shift right
dual-16 clip signed to signed
dual-16 clip signed to unsigned
Unsigned bytewise quad max
Unsigned bytewise quad min
Clipped signed 32-bit add
Clipped unsigned 32-bit add
Dual clipped add of signed 16-
bit halfwords
Quad clipped add of unsigned/
signed bytes
Clipped signed 32-bit multiply
Clipped unsigned 32-bit multi-
ply
Dual clipped multiply of signed
16-bit halfwords
Clipped signed 32-bit subtract
Clipped unsigned 32-bit sub-
tract
Dual clipped subtract of signed
16-bit halfwords
Signed sum of products of
signed 16-bit halfwords
Signed sum of products of
signed bytes
Signed sum of products of
signed/unsigned bytes
Unsigned sum of products of
unsigned 16-bit halfwords
Unsigned sum of products of
unsigned bytes
Merge dual-16 least-significant
bytes
Merge least-significant bytes
Merge most-significant bytes
Pack least-significant 16-bit
halfwords
Pack most-significant 16-bit
halfwords
Pack least-significant bytes
Unsigned byte-wise quad aver-
age
Unsigned quad 8-bit multiply
most significant
Unsigned sum of absolute val-
ues of signed 8-bit differences
Unsigned sum of absolute val-
ues of unsigned 8-bit differ-
ences
dspidualabs
Shift
Clip
dualasr
dualiclipi
dualuclipi
quadumax
quadumin
dspiadd
dspuadd
dspidualadd
Min,max
DSP add
dspuquadaddui
DSP
multiply
dspimul
dspumul
dspidualmul
DSP
subtract
dspisub
dspusub
dspidualsub
Sum of
products
ifir16
ifir8ii
ifir8iu
ufir16
ufir8uu
Merge,
pack
mergedual16lsb
mergelsb
mergemsb
pack16lsb
pack16msb
packbytes
quadavg
Byte
averages
Byte
multiplies
Motion
estima-
tion
quadumulmsb
ume8ii
ume8uu
Table 4-2. Key Multimedia Custom Operations Listed
by Operand Size
Op. Size
Custom Op
Description
32-bit
dspiabs
dspiadd
dspuadd
dspimul
dspumul
Clipped signed 32-bit abs value
Clipped signed 32-bit add
Clipped unsigned 32-bit add
Clipped signed 32-bit multiply
Clipped unsigned 32-bit multi-
ply
Clipped signed 32-bit subtract
Clipped unsigned 32-bit sub-
tract
Merge dual-16 least-significant
bytes
dual-16 arithmetic shift right
dual-16 clip signed to signed
dual-16 clip signed to unsigned
Dual clipped multiply of signed
16-bit halfwords
Dual clipped absolute values of
signed 16-bit halfwords
Dual clipped add of signed 16-
bit halfwords
Dual clipped subtract of signed
16-bit halfwords
Signed sum of products of
signed 16-bit halfwords
Unsigned sum of products of
unsigned 16-bit halfwords
Pack least-significant 16-bit
halfwords
Pack most-significant 16-bit
halfwords
dspisub
dspusub
16-bit
mergedual16lsb
dualasr
dualiclipi
dualuclipi
dspidualmul
dspidualabs
dspidualadd
dspidualsub
ifir16
ufir16
pack16lsb
pack16msb