PRELIMINARY SPECIFICATION
10-1
SPDIF Out
Chapter 10
by Gert Slavenburg, Santanu Dutta
10.1
SPDIF OUT OVERVIEW
n this document, the generic PNX1300 name refers
to the PNX1300 Series, or the PNX1300/01/02/11
products.
The PNX1300 SPDIF Output unit (SPDO) allows gener-
ation of a 1-bit high-speed serial data stream. The prima-
ry application is to make SPDIF (Sony/Philips Digital In-
terface) data available for use by external audio
equipment.
The SPDO unit has the following features:
fully compliant with IEC958, for both consumer and
professional applications
supports 2-channel linear PCM audio, with 16 or 24
bits per sample
supports one or more Dolby Digital(r) 6-channel data
streams embedded per Project 1937
supports one or more MPEG-1 or MPEG-2 audio
streams embedded per Project 1937
allows arbitrary, programmable, sample rates from 1
Hz to 300 kHz
can output data with a sample rate independent of
and asynchronous to the sample rate of the Audio
Out (AO) unit
hardware performs autonomous DMA of memory
resident IEC958 sub-frames
hardware performs parity generation and bi-phase
mark encoding
allows software to have full control over all data con-
tent, including user and channel data
Alternate use of the SPDO unit to generate a general-
purpose high-speed data stream is possible. Potential
applications include use as a high-speed UART or high
speed serial data channel. In this case features are:
up to 40 Mbit/sec data rate
full software control over each bit cell transmitted
LSB first or MSB first data format
10.2
EXTERNAL INTERFACE
The external interface consists of only one pin, SPDO,
which is described in
Table 10-1
.
An external circuit (see
Figure 10-1
) is required to pro-
vide an electrically isolated output and convert the 3.3 V
output pin to a drive level of 0.5 V peak-peak into a 75-
ohm load, as required for consumer applications of IEC-
958.
10.3
SUMMARY OF OPERATION
In both SPDIF and transparent DMA modes, SPDO
sends alternating memory data buffers out across the
output pin. Software initially gives SPDO two memory
data buffers and enables the SPDO unit. When the first
buffer is sent, SPDO requests a new buffer from software
while switching over to use the other buffer, etc. Trans-
mission continues uninterrupted until the unit is disabled.
10.3.1
SPDIF Mode
SPDIF driver software assembles SPDIF data in each
memory data buffer. Each memory data buffer consists
of groups of 32-bit words in memory. Each word de-
scribes the data to be transmitted for a single IEC-958
sub-frame, including what type of preamble is to be in-
cluded. Each sub-frame is transmitted in 64-clock cycle
intervals of the SPDO clock, a programmable clock gen-
erated by the SPDO Direct Digital Synthesizer (DDS).
10.3.2
Transparent DMA Mode
In transparent DMA mode, software prepares each data
bit exactly as it is to be transmitted, in a series of 32-bit
words in each memory data buffer. Each 32-bit word is
Table 10-1. SPDO external signals
Signal
Type
Description
SPDO
I/O
SPDIF output. Self clocking interface
carrying either 2-channel PCM data with
samples up to 24 bits, or encoded Dolby
AC-3(r) or MPEG audio data for decod-
ing by an external audio component.
Figure 10-1. External SPDIF interface circuitry
10 uF
240E
110E
transformer
1:1
1.5 - 7 MHz
RCA
phono
SPDO
PNX1300