參數(shù)資料
型號(hào)： OX16PCI952
廠商： Electronic Theatre Controls, Inc.
英文描述： Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
中文描述： 集成高性能的雙UART，并行端口和5.0V PCI接口
文件頁數(shù)： 9/76頁
文件大小： 1386K
代理商： OX16PCI952
DataSheet Revision 1.1
Page 9
OX16PCI952
OXFORD SEMICONDUCTOR LTD.
Pins
Dir
1
Name
Description
Serial port pins (Contd)
106
96
I
I
DCD[0]#
DCD[1]#
DTR[0]#
DTR[1]#
485_En[0]
485_En[1]
Tx_Clk_Out[0]
Tx_Clk_Out[1]
Active-low modem“data-carrier-detect” input, for UART 0
and UART 1.
109
99
109
99
109
99
O
O
O
O
O
O
Active-low modem“data-termnal-ready output”, for UART 0
and UART 1.
If automated DTR# flow control is enabled for the
corresponding UART channel, the DTR#pin is asserted and
deasserted if the receiver FIFO reaches or falls below the
channel’s programmed thresholds, respectively.
In RS485 halfduplex mode, the DTR# pin of each UART
channel may be programmed to reflect the state of the
channel’s transmtter empty bit to automatically control the
direction of the RS485 transceiver buffer (see register
ACR[4:3])
Transmtter 1x clock (baud rate generator output).
For isochronous applications, the 1x (or Nx) transmtter clock
of each UART channel may be asserted on the DTR# pins
(see register CKS[5:4])
Active-low modem“requestto-send” output, for UART 0 and
UART 1.
If automated RTS#flow control is enabled for the
corresponding UART channel, the RTS#pin is deasserted
and reasserted whenever the receiver FIFO reaches or falls
below the programmed thresholds, respectively.
Active-low modem“clear-to-send” input, for UART 0 and
UART 1.
If automated CTS# flow control is enabled for the
corresponding UART channel, upon deassertion of the CTS#
pin, the channel’s transmtter will complete the current
character and enter the idle mode until the CTS#pin is
reasserted. Note: flow control characters are transmtted
regardless of the state of the CTS#pin.
Active-low modem“data-set-ready” input, for UART 0 and
UART 1.
If automated DSR#flow control is enabled for the
corresponding UART channel, upon deassertion of the
channel’s DSR#pin, the transmtter will complete the current
character and enter the idle mode until the DSR#pin is
reasserted. Note: flow control characters are transmtted
regardless of the state of the DSR#pin
External receiver clock input, for isochronous applications.
The DSR Uart pins are redefined as Rx_Clk_In, when the
corresponding UART channel’s CKS[1:0] register bits = ‘01’.
Active-low modem“Ring-Indicator” input, for UART 0 and
UART 1.
External transmtter clock.
The RI Uart pins are redefined as transmtter clk pins (and
thus used indirectly by the receiver) when the UART
channel’s CKS[6] register bit =’1’.
110
100
O
O
RTS[0]#
RTS[1]#
108
98
I
I
CTS[0]#
CTS[1]#
107
97
107
97
I
I
I
I
DSR[0]#
DSR[1]#
Rx_Clk_In[0]
Rx_Clk_In[0]
RI[0]#
RI[1]#
Tx_Clk_In[0]
Tx_Clk_In[0]
105
95
105
95
I
I
I
I
相關(guān)PDF資料
PDF描述
OX16PCI952-TQFP-A Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
OX16PCI954 Integrated Quad UART and PCI interface
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
OX16PCI952_05 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
OX16PCI952-TQAG 制造商:PLX Technology 功能描述: 制造商:Oxford Semiconductor 功能描述:IC PCI BRIDGE DUAL PORT UART SMD
OX16PCI952-TQC60-A 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
OX16PCI952-TQFP-A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
OX16PCI954 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated Quad UART and PCI interface
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