參數(shù)資料
型號(hào)： OX16PCI952
廠商： Electronic Theatre Controls, Inc.
英文描述： Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
中文描述： 集成高性能的雙UART，并行端口和5.0V PCI接口
文件頁(yè)數(shù)： 21/76頁(yè)
文件大?。?/td> 1386K
代理商： OX16PCI952
6.4.3
The receiver and transmtter FIFO levels of both UARTs is mrrored (shadowed) in this local configuraton register, as follows.
Bits
Description
7:0
UART0 Receiver FIFO Level
(RFL[7:0])
15:8
UART1 Receiver FIFO Level
(RFL[7:0])
23:16
UART0 Transmitter FIFO Level
(TFL[7:0])
31:24
UART1 Transmitter FIFO Level
(TFL[7:0])
6.4.4
UART Interrupt Source Register ‘UIS’ (Offset 0x0C)
The Interrupt Source Register of each UART and the general data status, is mrrored (shadowed) in this local configuration
register, as follows.
Bits
Description
5:0
UART0 Interrupt Source Register
(ISR[5:0])
11:6
UART1 Interrupt Source Register
(ISR[5:0])
15:12
Reserved
16
UART0 Good-Data Status
17
UART1 Good-Data Status
30:18
Reserved
31
Global Good-Data Status
. This bit is the logical AND of bits 16 and 17,
i.e. it is set if Good-Data Status of all internal UARTs is set.
Good-Data status for a given internal UART is set when all of the following conditions are met:
ISR reads a level0 (no-interrupt pending), a level 2a (receiver data available), a level 2b (receiver time-out) or a level 3
(transmtter THR empty) interrupt
LSR[7] is clear so there is no parity error, framng error or break in the FIFO
LSR[1] is clear so no over-run error has occurred
If the device driver software reads a given channel’s receiver FIFO levels (fromthe UFL register) followed by the UIS register,
and the Good-Data status for that channel is set, the driver can remove the number of bytes indicated by the FIFO level without
the need to read the line status register of that channel. This feature enhances the driver efficiency.
For a given channel, if the Good-Data status bit is
not
set, then the software driver should examne the corresponding ISR bits.
If the ISR indicates a level 4 or higher interrupt, the interrupt is due to a change in the state of modemlines or detection of flow
control characters, for that channel. The device driver-software should then take appropriate measures as would in any other
550/950 driver. When ISR indicates a level 1 (receiver status) interrupt then the driver can examne the Line Status Register
(LSR) of the relevant channel. Since reading the LSR clears LSR[7], the device driver-software should either flush or empty the
contents of the receiver FIFO, otherwise the Good-Data status will no longer be valid.
The UART FIFO Level (UFL), the UART Interrupt Source register (UIS) and the Global Interrupt Status register (GIS) are
allocated adjacent address offsets (08h to 10h) in the Base Address Register. The device driver-software can read all of the
above registers in a single burst read operation. The location offset of the registers are such that the FIFO levels are usually read
before the status registers so that the status of the N characters indicated in the receiver FIFO levels are valid.
DataSheet Revision 1.1
Page 21
OX16PCI952
OXFORD SEMICONDUCTOR LTD.
UART FIFO Levels ‘UFL’ (Offset 0x08)
Read/Write
EEPROM
-
-
-
-
Reset
0x00h
0x00h
0x00h
0x00h
PCI
R
R
R
R
Read/Write
EEPROM
-
-
-
-
-
-
-
Reset
01h
01h
0h
PCI
R
R
R
R
R
R
R
1
1
00h
1
相關(guān)PDF資料
PDF描述
OX16PCI952-TQFP-A Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
OX16PCI954 Integrated Quad UART and PCI interface
OX16PCI954-TQC60-A Integrated Quad UART and PCI interface
OX4240 OCXO
OX1040 OCXO
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
OX16PCI952_05 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
OX16PCI952-TQAG 制造商:PLX Technology 功能描述: 制造商:Oxford Semiconductor 功能描述:IC PCI BRIDGE DUAL PORT UART SMD
OX16PCI952-TQC60-A 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
OX16PCI952-TQFP-A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
OX16PCI954 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated Quad UART and PCI interface
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*