參數(shù)資料
型號: OX16PCI952
廠商: Electronic Theatre Controls, Inc.
英文描述: Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface
中文描述: 集成高性能的雙UART,并行端口和5.0V PCI接口
文件頁數(shù): 15/76頁
文件大?。?/td> 1386K
代理商: OX16PCI952
DataSheet Revision 1.1
Page 15
OX16PCI952
OXFORD SEMICONDUCTOR LTD.
6.2
Configuration space
The OX16PCI952 is a dual-function (or single function)
device, where each logical function has its own PCI
configuration space.
All the required fields in the predefined PCI header region
have been implemented. The device dependant region of
the PCI configuration space contains the PCI Power
Management Extended Capability register set.
6.2.1
PCI Configuration Space Register map
The format of the configuration space, for both function 0
and function 1, is as shown in Table 4, below.
In general, writes to any registers that are not implemented
are ignored, and all reads fromunimplemented registers
return 0.
Configuration Register Description
16
Offset
Address
00h
04h
08h
0Ch
10h
31
15
0
Device ID
Status
Vendor ID
Command
Class Code
Header Type
Base Address Register 0 (BAR 0)
Function 0 – UART0 in I/O Space
Function 1 – Parallel Port Base Register Set in I/O Space
Base Address Register 1 (BAR 1)
Function 0 – UART1 I/O Space
Function 1 – Parallel Port Extended Register Set in I/O space
Base Address Register 2 (BAR 2)
Local Configuration Registers in IO space, for function 0 and function 1
Base Address Register 3 (BAR 3)
Local Configuration Registers in Memory space, for function 0 and function 1
Base Address Register 4 (BAR 4)
Function 0 – UART0 and UART1 in Memory Space
Function 1 – Not Implemented.
Base Address Register 5 (BAR5)
Not Implemented, for function 0 and function 1
Reserved
SubsystemID
Reserved
Reserved
Reserved
Reserved
Reserved
Revision ID
Reserved
BIST
1
Reserved
14h
18h
1Ch
20h
24h
28h
2Ch
30h
34h
38h
3Ch
SubsystemVendor ID
Cap_Ptr
Interrupt Pin
Interrupt Line
Predefined PCI Header Region
Device Dependent PCI Region
Power Management Capabilities (PMC)
Reserved
Next Ptr
PMC Control/Status Register (PMCSR)
Cap_ID
40h
44h
Reserved
Table 4: PCI Configuration space (for UART and Parallel Port function)
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