參數(shù)資料
型號(hào)： OX16C954-TQC60-B
廠商： Electronic Theatre Controls, Inc.
英文描述： High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface
中文描述： UART的高性能四路128字節(jié)的FIFO英特爾/摩托羅拉總線(xiàn)接口
文件頁(yè)數(shù)： 36/54頁(yè)
文件大?。?/td> 529K
代理商： OX16C954-TQC60-B
Data Sheet Revision 1.0
Page 36
OX16C954 rev B
OXFORD SEMICONDUCTOR LTD.
14.4 Input Clock Options
A systemclock must be applied to XTLI pin on the device.
The speed of this clock determnes the maximumbaud rate
at which the device can receive and transmt serial data.
This maximumis equal to one sixteenth of the frequency of
the systemclock (Increasing to one quarter of this value if
TCR=4 is used)
The industry standard systemclock for PC COMports is
1.8432 MHz, limting the maximumbaud rate to 115.2
Kbps. The OX16C95x UARTs support systemclocks up to
60MHz (at 5V) and its flexible baud rate generation
hardware means that almost any frequency can be
optionally scaled down for compatibility with standard
devices.
Designers have the option of using either TTL clock
modules or crystal oscillator circuits for systemclock input,
with mnimal additional components. The following two
sections describe how each can be connected.
14.5 TTL Clock Mode
Using a TTL module for the systemclock simply requires
the module to be supplied with power and GND
connections. The clock output can then be connected
directly to XTLI. XTLO should be left unconnected.
CLOCK
XTLI
VDD
Figure 2: TTL Clock Module Connectivity
14.6 External 1x Clock Mode
The transmtter and receiver can accept an external clock
applied to the RI#and DSR#pins respectively. The clock
options are selected using the CKS register (see section
15.8). The transmtter and receiver may be configured to
operate in 1x (i.e. Isochronous mode) by setting CKS[7]
and CKS[3], respectively. In Isochronous mode, transmtter
or receiver will use the 1x clock (usually, but not
necessarily, an external source) where asynchronous
framng is maintained using start, parity and stop-bits.
However serial transmssion and reception is synchronised
to the 1x clock. In this mode asynchronous data may be
transmtted at baud rates up to 60Mbps. The local 1x clock
source can be asserted on the DTR#pin.
Note that line drivers need to be capable of transmssion at
data rates twice the systemclock used (as one cycle of the
systemclock corresponds to 1 bit of serial data). Also note
that enabling modeminterrupts is illegal in isochronous
mode, as the clock signal will cause a continuous change
to the modemstatus (unless masked in MDMregister, see
section 15.10).
14.7 Crystal Oscillator Circuit
The OX16C954 may be clocked by a crystal connected to
XTLI and XTLO or directly froma clock source connected
to the XTLI pin (or CLKSEL if selected by software). The
circuit required to use the on-chip oscillator is shown in
Figure 3.
R
1
R
2
C
1
C
2
XTLI
XTLO
Figure 3: Crystal Oscillator Circuit
Frequency
Range
(MHz)
1.8432 - 8
8-60
C
1
(pF)
C
2
(pF)
R
1
(
)
R
2
(
)
68
33-68
22
220k
220k-2M2
470R
470R
33 – 68
Table 19: Component values
Note: For better stability use a smaller value of R
1
.
Increase R
1
to reduce power consumption.
The total capacitive load (C1 in series with C2) should be
that specified by the crystal manufacturer (nomnally 16pF).
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