參數(shù)資料
型號: OR4E4
廠商: Lineage Power
英文描述: Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
中文描述: 現(xiàn)場可編程門陣列(現(xiàn)場可編程門陣列)
文件頁數(shù): 73/132頁
文件大?。?/td> 2667K
代理商: OR4E4
Lucent Technologies Inc.
73
Preliminary Data Sheet
August 2000
ORCA Series 4 FPGAs
Absolute Maximum Ratings
(continued)
Table 39. Absolute Maximum Ratings
Recommended Operating Conditions
Table 40. Recommended Operating Conditions
Note: The maximum recommended junction temperature (T
J
) during operation is 125 °C.
Electrical Characteristics
Table 41. Electrical Characteristics
* The pull-up resistor will externally pull the pin to a level 1.0 V below V
DD
IO.
Parameter
Symbol
T
stg
V
DD
3
V
DD
15
Min
–65
Max
150
4.2
2
Unit
°C
V
V
V
V
°C
Storage Temperature
Power Supply Voltage with Respect to Ground
Input Signal with Respect to Ground
Signal Applied to High-impedance Output
Maximum Package Body Temperature
V
SS
– 0.3
V
SS
– 0.3
V
DDIO
+ 0.3
V
DDIO
+ 0.3
220
Parameter
Symbol
V
DD
3
V
DD
15
V
IN
T
J
Min
2.7
1.4
Max
3.6
1.6
Unit
V
V
V
°C
Power Supply Voltage with Respect to Ground
Input Voltages
Junction Temperature
V
SS
– 0.3
–40
V
DDIO
+ 0.3
125
Parameter
Symbol
I
L
I
DDSB
Test Conditions
V
DD
= max, V
IN
= V
SS
or V
DD
T
A
= 25 °C, V
DD
= 3.3 V
internal oscillator running, no output loads,
inputs V
DD
or GND (after configuration)
Min
–10
Max
10
Unit
μA
Input Leakage Current
Standby Current:
OR4E2
OR4E4
OR4E6
OR4E10
OR4E14
Standby Current:
OR4E2
OR4E4
OR4E6
OR4E10
OR4E14
Powerup Current:
OR4E2
OR4E4
OR4E6
OR4E10
OR4E14
TBD
TBD
TBD
TBD
TBD
mA
mA
mA
mA
mA
I
DDSB
T
A
= 25 °C, V
DD
= 3.3 V
internal oscillator stopped, no output loads,
inputs V
DD
or GND (after configuration)
TBD
TBD
TBD
TBD
TBD
mA
mA
mA
mA
mA
Ipp
Power supply current at approximately 1 V, within
a recommended power supply ramp rate of
1 ms—200 ms
TBD
TBD
TBD
TBD
TBD
mA
mA
mA
mA
mA
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