參數(shù)資料
型號(hào)： MT28F640J3
廠商： Micron Technology, Inc.
英文描述： 64Mb Flash Memory(64Mb閃速存儲(chǔ)器)
中文描述： 64MB Flash記憶體（64兆閃速存儲(chǔ)器）
文件頁(yè)數(shù)： 34/45頁(yè)
文件大?。?/td> 317K
代理商： MT28F640J3
34
64Mb, 32Mb SirusFlash Memory
MT28F640J3_2.p65 – Rev. 1, Pub. 12/00
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2000, Micron Technology, Inc.
64Mb, 32Mb
SIRUSFLASH MEMORY
PRELIMINARY
REDUCING OVERSHOOTS AND UNDER-
SHOOTS WHEN USING BUFFERS OR
TRANSCEIVERS
Overshoots and undershoots can sometimes cause
input signals to exceed Flash memory specifications as
faster, high-drive devices such as transceivers or buff-
ers drive input signals to Flash memory devices. Many
buffer/transceiver vendors now carry bus-interface
devices with internal output-damping resistors or
reduced-drive outputs. Internal output-damping
resistors diminish the nominal output drive currents,
while still leaving sufficient drive capability for most
applications. These internal output-damping resistors
help reduce unnecessary overshoots and undershoots
by diminishing output-drive currents. When consider-
ing a buffer/transceiver interface design to Flash, de-
vices with internal output-damping resistors or re-
duced-drive outputs should be used to minimize over-
shoots and undershoots.
V
CC
, V
PEN
, RP# TRANSITIONS
If V
PEN
or V
CC
falls outside of the specified operating
ranges, or RP# is not set to V
IH
, block erase, program,
and lock bit configuration are not guaranteed. If RP#
transitions to V
IL
during block erase, program, or lock
bit configuration, STS (in default mode) will remain
LOW for a maximum time of
t
PLPH +
t
PHRH, until the
RESET operation is complete and the device enters
reset/power-down mode. The aborted operation may
leave data partially corrupted after programming, or
partially altered after an erase or lock bit configuration.
Therefore, BLOCK ERASE and LOCK BIT CONFIGURA-
TION commands must be repeated after normal op-
eration is restored. Device power-off or RP# = V
IL
clears
the status register. The CEL latches commands issued
by system software and is not altered by V
PEN
or CEx
transitions, or ISM actions. Its state is read array mode
upon power-up, upon exiting reset/power-down
mode, or after V
CC
transitions below V
LKO
. V
CC
must be
kept at or above V
PEN
during V
CC
transitions.
After block erase, program, or lock bit configuration,
and after V
PEN
transitions to V
PENLK
, the CEL must be
placed in read array mode via the READ ARRAY com-
mand if subsequent access to the memory array is de-
sired. During V
PEN
transitions, V
PEN
must be kept at or
below V
CC
.
POWER-UP/DOWN PROTECTION
During power transition, the device itself provides
protection against accidental block erasure, program-
ming, or lock bit configuration. Internal circuitry resets
the CEL to read array mode at power-up. A system
designer must watch out for spurious writes for V
CC
voltages above V
LKO
when V
PEN
is active. Because WE#
must be LOW and the device enabled (see Table 1) for
a command write, driving WE# to V
IH
or disabling the
device inhibits WRITEs. The CEL’s two-step command
sequence architecture provides added protection
against data alteration. In-system block lock and un-
lock capability protects the device against inadvertent
programming. The device is disabled when RP# = V
IL
regardless of its control inputs. Keeping V
PEN
below
V
PENLK
prevents inadvertent data change.
POWER DISSIPATION
Designers must consider battery power consump-
tion not only during device operation, but also for data
retention during system idle time. Flash memory’s
nonvolatility increases usable battery life because data
is retained when system power is removed.
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參數(shù)描述
MT28F640J3BS-115 ET 功能描述:IC FLASH 64MBIT 115NS 64FBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869
MT28F640J3BS-115 ET TR 功能描述:IC FLASH 64MBIT 115NS 64FBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:378 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-CBGA 供應(yīng)商設(shè)備封裝:48-CBGA（7x7） 包裝:托盤
MT28F640J3BS-115 GMET 功能描述:IC FLASH 64MBIT 115NS 64FBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869
MT28F640J3BS-115 GMET TR 功能描述:IC FLASH 64MBIT 115NS 64FBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:378 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:8M（1M x 8，512K x 16） 速度:110ns 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-CBGA 供應(yīng)商設(shè)備封裝:48-CBGA（7x7） 包裝:托盤
MT28F640J3BS-115 MET 功能描述:IC FLASH 64MBIT 115NS 64FBGA RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869
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