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| 型號(hào)： | MR83C154XXX-30/883 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁(yè)數(shù)： | 193/204頁(yè) |
| 文件大?。?/td> | 5687K |
| 代理商： | MR83C154XXX-30/883 |
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89
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
If external pin modes are used for the Timer/Counter1, transitions on the T1 pin will clock the counter even if the
pin is configured as an output. This feature allows software control of the counting.
12.10.2
TCNT1L – Timer/Counter1 Register Low Byte
The Timer/Counter1 Register Low Byte, TCNT1L, gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT1L Register blocks (disables) the Compare Match on the fol-
lowing timer clock. Modifying the counter (TCNT1L) while the counter is running, introduces a risk of missing a
Compare Match between TCNT1L and the OCR1x Registers. In 16-bit mode the TCNT1L register contains the
lower part of the 16-bit Timer/Counter1 Register.
12.10.3
TCNT1H – Timer/Counter1 Register High Byte
When 16-bit mode is selected (the TCW1 bit is set to one) the Timer/Counter Register TCNT1H combined to the
Timer/Counter Register TCNT1L gives direct access, both for read and write operations, to the Timer/Counter unit
16-bit counter. To ensure that both the high and low bytes are read and written simultaneously when the CPU
accesses these registers, the access is performed using an 8-bit temporary high byte register (TEMP). This tempo-
rary register is shared by all the other 16-bit registers. See “Accessing Registers in 16-bit Mode” on page 84
12.10.4
OCR1A – Timer/Counter1 Output Compare Register A
The Output Compare Register A contains an 8-bit value that is continuously compared with the counter value
(TCNT1L). A match can be used to generate an Output Compare interrupt.
In 16-bit mode the OCR1A register contains the low byte of the 16-bit Output Compare Register. To ensure that
both the high and the low bytes are written simultaneously when the CPU writes to these registers, the access is
performed using an 8-bit temporary high byte register (TEMP). This temporary register is shared by all the other
16-bit registers. See “Accessing Registers in 16-bit Mode” on page 84.
12.10.5
OCR1B – Timer/Counter1 Output Compare Register B
101
clkI/O/1024 (From prescaler)
1
0
External clock source on T1 pin. Clock on falling edge.
1
External clock source on T1 pin. Clock on rising edge.
Table 12-4.
Clock Select Bit Description (Continued)
CS12
CS11
CS10
Description
Bit
76543210
TCNT1L[7:0]
TCNT1L
Read/Write
R/W
Initial Value
00000000
Bit
76543210
TCNT1H[7:0]
TCNT1H
Read/Write
R/W
Initial Value
00000000
Bit
76543210
OCR1A[7:0]
OCR1A
Read/Write
R/W
Initial Value
00000000
Bit
76543210
OCR1B[7:0]
OCR1B
Read/Write
R/W
Initial Value
00000000
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