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參數(shù)資料
| 型號(hào)： | MR83C154XXX-30/883 |
| 廠商： | ATMEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 30 MHz, MICROCONTROLLER, CQCC44 |
| 封裝： | LCC-44 |
| 文件頁數(shù)： | 123/204頁 |
| 文件大?。?/td> | 5687K |
| 代理商： | MR83C154XXX-30/883 |
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25
ATtiny40 [DATASHEET]
8263B–AVR–01/2013
BOD disable is controlled by the BODS (BOD Sleep) bit of MCU Control Register, see “MCUCR – MCU Control
Register” on page 26. Writing this bit to one turns off BOD in Power-down and Stand-by, while writing a zero keeps
the BOD active. The default setting is zero, i.e. BOD active.
Writing to the BODS bit is controlled by a timed sequence, see “MCUCR – MCU Control Register” on page 26.
7.3
Power Reduction Register
The Power Reduction Register (PRR), see “PRR – Power Reduction Register” on page 27, provides a method to
reduce power consumption by stopping the clock to individual peripherals. When the clock for a peripheral is
stopped then:
The current state of the peripheral is frozen.
The associated registers can not be read or written.
Resources used by the peripheral will remain occupied.
The peripheral should in most cases be disabled before stopping the clock. Clearing the PRR bit wakes up the
peripheral and puts it in the same state as before shutdown.
Peripheral shutdown can be used in Idle mode and Active mode to significantly reduce the overall power consump-
tion. See “Supply Current of I/O Modules” on page 159 for examples. In all other sleep modes, the clock is already
stopped.
7.4
Minimizing Power Consumption
There are several issues to consider when trying to minimize the power consumption in an AVR Core controlled
system. In general, sleep modes should be used as much as possible, and the sleep mode should be selected so
that as few as possible of the device’s functions are operating. All functions not needed should be disabled. In par-
ticular, the following modules may need special consideration when trying to achieve the lowest possible power
consumption.
7.4.1
Analog Comparator
When entering Idle mode, the analog comparator should be disabled if not used. In the power-down mode, the
analog comparator is automatically disabled. See “Analog Comparator” on page 94 for further details.
7.4.2
Analog to Digital Converter
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be disabled before entering
any sleep mode. When the ADC is turned off and on again, the next conversion will be an extended conversion.
See “Analog to Digital Converter” on page 98 for details on ADC operation.
7.4.3
Watchdog Timer
If the Watchdog Timer is not needed in the application, this module should be turned off. If the Watchdog Timer is
enabled, it will be enabled in all sleep modes, and hence, always consume power. In the deeper sleep modes, this
will contribute significantly to the total current consumption. Refer to “Watchdog Timer” on page 31 for details on
how to configure the Watchdog Timer.
7.4.4
Brown-out Detector
If the Brown-out Detector is not needed in the application, this module should be turned off. If the Brown-out Detec-
tor is enabled by the BODLEVEL Fuses, it will be enabled in all sleep modes, and hence, always consume power.
In the deeper sleep modes, this will contribute significantly to the total current consumption. See “Brown-out Detec-
tion” on page 30 and “Software BOD Disable” on page 24 for details on how to configure the Brown-out Detector.
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