
MOTOROLA
Contents
vii
CONTENTS
Paragraph
Number
Title
Page
Number
4.1.3.1
4.2
Accessing SPRs..........................................................................................4-11
Register Initialization at Reset...........................................................................4-11
Chapter 5
MPC850 Instruction Set
5.1
5.1.1
5.1.2
5.2
5.2.1
5.2.1.1
5.2.1.2
5.2.1.3
5.2.1.4
5.2.2
5.2.2.1
5.2.2.2
5.2.2.3
5.2.2.3.1
5.2.2.3.2
5.2.2.3.3
5.2.3
5.2.4
5.2.4.1
5.2.4.1.1
5.2.4.1.2
5.2.4.1.3
5.2.4.1.4
5.2.4.2
5.2.4.2.1
5.2.4.2.2
5.2.4.2.3
5.2.4.2.4
5.2.4.2.5
5.2.4.2.6
5.2.4.3
5.2.4.3.1
5.2.4.3.2
5.2.4.3.3
5.2.4.4
5.2.4.5
Operand Conventions...........................................................................................5-1
Data Organization in Memory and Data Transfers..........................................5-1
Aligned and Misaligned Accesses ...................................................................5-1
Instruction Set Summary......................................................................................5-2
Classes of Instructions......................................................................................5-3
Definition of Boundedly Undefined ............................................................5-4
Defined Instruction Class.............................................................................5-4
Illegal Instruction Class ...............................................................................5-4
Reserved Instruction Class...........................................................................5-5
Addressing Modes............................................................................................5-5
Memory Addressing.....................................................................................5-5
Effective Address Calculation .....................................................................5-6
Synchronization ...........................................................................................5-6
Context Synchronization..........................................................................5-6
Execution Synchronization......................................................................5-7
Instruction-Related Exceptions................................................................5-7
Instruction Set Overview..................................................................................5-7
PowerPC UISA Instructions ............................................................................5-8
Integer Instructions ......................................................................................5-8
Integer Arithmetic Instructions................................................................5-8
Integer Compare Instructions...................................................................5-9
Integer Logical Instructions...................................................................5-10
Integer Rotate and Shift Instructions .....................................................5-10
Load and Store Instructions .......................................................................5-11
Integer Load and Store Address Generation..........................................5-11
Register Indirect Integer Load Instructions ...........................................5-12
Integer Store Instructions.......................................................................5-13
Integer Load and Store with Byte-Reverse Instructions........................5-13
Integer Load and Store Multiple Instructions........................................5-14
Integer Load and Store String Instructions............................................5-14
Branch and Flow Control Instructions.......................................................5-15
Branch Instruction Address Calculation................................................5-15
Branch Instructions................................................................................5-16
Condition Register Logical Instructions................................................5-16
Trap Instructions........................................................................................5-17
Processor Control Instructions...................................................................5-17