MOTOROLA
Contents
xlvii
TABLES
Table
Number
Title
Page
Number
i
ii
iii
iv
1-1
2-1
v
vi
vii
3-1
3-2
3-3
3-4
3-5
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
Acronyms and Abbreviated Terms.................................................................................lxvi
Terminology Conventions..............................................................................................lxix
Instruction Field Conventions ......................................................................................... lxx
Acronyms and Abbreviated Terms...................................................................................I-ii
MPC850 Functionality Matrix...................................................................................1-2
MPC850 Internal Memory Map.................................................................................2-1
Acronyms and Abbreviated Terms................................................................................II-iii
Terminology Conventions...............................................................................................II-v
Instruction Field Conventions ....................................................................................... II-vi
Static Branch Prediction ............................................................................................3-9
Bus Cycles Needed for Single-Register Load/Store Accesses................................3-13
UISA-Level Features...............................................................................................3-15
VEA-Level Features................................................................................................3-16
OEA-Level Features................................................................................................3-17
User-Level PowerPC Registers..................................................................................4-2
User-Level PowerPC SPRs........................................................................................4-2
Bit Settings for CR0 Field of CR...............................................................................4-3
XER Field Definitions...............................................................................................4-4
Supervisor-Level PowerPC Registers........................................................................4-4
Supervisor-Level PowerPC SPRs..............................................................................4-5
Value Summary of the DAR, BAR, and DSISR Registers........................................4-6
MSR Field Descriptions.............................................................................................4-7
MPC850-Specific Supervisor-Level SPRs................................................................4-9
MPC850-Specific Debug-Level SPRs.....................................................................4-10
Addresses of SPRs Located Outside of the Core.....................................................4-11
Memory Operands .....................................................................................................5-2
Integer Arithmetic Instructions..................................................................................5-8
Integer Compare Instructions.....................................................................................5-9
Integer Logical Instructions.....................................................................................5-10
Integer Rotate Instructions.......................................................................................5-11
Integer Shift Instructions..........................................................................................5-11
Integer Load Instructions.........................................................................................5-12
Integer Store Instructions.........................................................................................5-13
Integer Load and Store with Byte-Reverse Instructions..........................................5-14
Integer Load and Store Multiple Instructions..........................................................5-14
Integer Load and Store String Instructions..............................................................5-14