
MOTOROLA
Chapter 21. Serial Communications Controllers
21-9
Part V. The Communications Processor Module
18D20 RENC Receiver decoding/transmitter encoding method. Select NRZ if DPLL is not used. RENC should equal
TENC in most applications. However, do not use this internal DPLL for Ethernet.
000 NRZ (default setting if DPLL is not used). Required for UART (synchronous or asynchronous).
001 NRZI Mark (set RINV/TINV also for NRZI space).
010 FM0 (set RINV/TINV also for FM1).
011 Reserved.
100 Manchester.
101 Reserved.
110 Differential Manchester (Differential Bi-phase-L).
111 Reserved.
21D23 TENC
24D25 DIAG
Diagnostic mode.
00 Normal operation, CTS and CD are under automatic control. Data is received through RXD and
transmitted through TXD. The SCC uses modem signals to enable or disable transmission and
reception. These timings are shown in Section 21.4.4, òControlling SCC Timing with RTS, CTS,
and CD.ó
01 Local loopback mode. Transmitter output is connected internally to the receiver input, while the
receiver and the transmitter operate normally. The value on RXD is ignored. If enabled, data
appears on TXD, or the parallel I/O registers can be programmed to make TXD high. RTS can also
be programmed to be disabled in the appropriate parallel I/O register. The transmitter and receiver
must share the same clock source, but separate CLK
x
pins can be used if connected to the same
external clock source.
If external loopback is preferred, program DIAG for normal operation and externally connect TXD
and RXD. Then, physically connect the control signals (RTS connected to CD, and CTS grounded)
or set the parallel I/O registers so CD and CTS are permanently asserted to the SCC by
conTguring the associated CTS and CD pins as general-purpose I/O.
10 Automatic echo mode. The transmitter automatically resends received data bit-by-bit using the Rx
clock provided. The receiver operates normally and receives data if CD is asserted. CTS is
ignored.
11 Loopback and echo mode. Loopback and echo operation occur simultaneously. CD and CTS are
ignored. See the loopback bit description above for clocking requirements.
For TDM operation, the diagnostic mode is selected by SIMODE[SDM
x
]; see Section 20.2.4.2, òSI
Mode Register (SIMODE).ó
26
ENR
Enable receive. Enables the receiver hardware state machine for this SCC.
0 The receiver is disabled and data in the Rx FIFO is lost. If ENR is cleared during reception, the
receiver aborts the current character.
1 The receiver is enabled.
ENR can be set or cleared, regardless of whether serial clocks are present. Section 21.4.7,
òReconTguring the SCCs,ó describes how to disable/enable SCCs. Note that SCCs provide other tools
for controlling receptionthe
ENTER
HUNT
MODE
and
CLOSE
RXBD
commands, and RxBD[E].
27
ENT
Enable transmit. Enables the transmitter hardware state machine for this SCC.
0 The transmitter is disabled. If ENT is cleared during transmission, the current character is aborted
and TXD returns to the idle state. Data already in the Tx shift register is not sent.
1 The transmitter is enabled.
ENT can be set or cleared, regardless of whether serial clocks are present. Section 21.4.7,
òReconTguring the SCCs,ó describes how to disable/enable SCCs. Note that SCCs provide other tools
for controlling transmission besides the ENT bitthe
STOP
TRANSMIT
,
GRACEFUL
STOP
TRANSMIT
, and
RESTART
TRANSMIT
commands, the freeze option and CTS ow control option in UART mode, and
TxBD[R].
Table 21-2. GSMR_L Field Descriptions (Continued)
Bit
Name
Description