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MPC850 Integrated Communications Microprocessor Users Manual
MOTOROLA
CONTENTS
Paragraph
Number
Title
Page
Number
Chapter 35
CPM Interrupt Controller
35.1
35.2
35.2.1
35.2.2
35.2.3
35.3
35.4
35.5
35.5.1
35.5.2
35.5.3
35.5.4
35.5.5
35.6
35.7
Features...............................................................................................................35-1
CPM Interrupt Source Priorities.........................................................................35-3
Programming Relative Priority (Grouping and Spreading)............................35-3
Highest Priority Interrupt ...............................................................................35-4
Nested Interrupts ............................................................................................35-4
Masking Interrupt Sources in the CPM..............................................................35-4
Generating and Calculating Interrupt Vectors....................................................35-5
CPIC Registers ...................................................................................................35-6
CPM Interrupt Configuration Register (CICR)..............................................35-7
CPM Interrupt Pending Register (CIPR)........................................................35-8
CPM Interrupt Mask Register ........................................................................35-9
CPM Interrupt In-Service Register (CISR)....................................................35-9
CPM Interrupt Vector Register (CIVR).......................................................35-10
Interrupt Handler ExampleSingle-Event Interrupt Source...........................35-10
Interrupt Handler ExampleMultiple-Event Interrupt Source........................35-11
Chapter 36
System Development and Debugging
36.1
36.1.1
36.1.2
36.1.3
36.1.4
36.1.4.1
36.1.4.2
36.1.4.3
36.1.5
36.1.5.1
36.1.5.2
36.1.5.2.1
36.1.5.3
36.1.5.4
36.1.5.5
36.1.5.6
36.2
36.2.1
36.2.2
36.2.3
Tracking Program Flow......................................................................................36-1
Program Trace Functional Description ..........................................................36-2
Instruction Fetch Show Cycle Control...........................................................36-3
Program Trace Signals ...................................................................................36-3
Program Trace Special Cases.........................................................................36-4
Queue Flush Information Special Case......................................................36-4
Program Trace When In Debug Mode.......................................................36-5
Sequential Instructions Marked as Indirect Branch ...................................36-5
Reconstructing Program Trace.......................................................................36-5
Back Trace..................................................................................................36-5
Window Trace............................................................................................36-6
Synchronizing the Trace Window to Internal Core Events....................36-6
Detecting the Trace Window Start Address...............................................36-6
Detecting the Assertion/Negation of VSYNC............................................36-7
Detecting the Trace Window End Address................................................36-7
Efficient Trace Information Capture..........................................................36-7
Watchpoints and Breakpoints Support...............................................................36-8
Key Features...................................................................................................36-9
Internal Watchpoints and Breakpoints Logic...............................................36-10
Functional Description .................................................................................36-11