- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄2012 > MC92603VF (Freescale Semiconductor)IC TXRX ETH QUAD GIG 256-MAPBGA PDF資料下載
參數(shù)資料
| 型號(hào)： | MC92603VF |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 69/126頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TXRX ETH QUAD GIG 256-MAPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類(lèi)型： | 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 4/4 |
| 規(guī)程： | 千兆位以太網(wǎng) |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 256-LBGA |
| 供應(yīng)商設(shè)備封裝： | 256-MAPBGA |
| 包裝： | 托盤(pán) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)當(dāng)前第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)
Receiver
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, Rev. 1
Freescale Semiconductor
3-13
In an underrun situation, data must be repeated in order to maintain synchronization between the clock
domains. If ADIE is high and COMPAT is low, the receiver interface will repeat a pair of IDLE bytes when
underrun is imminent. This allows the user to establish ‘packets’ of data that do not contain IDLEs and the
MC92603 will not insert IDLEs in the middle of these ‘packets.’ The IDLE frequency to prevent underrun
is identical to the frequency to prevent overrun, so the same conditions apply.
If an underrun occurs, the ‘underrun’ error is reported as described in Table 3-12, Table 3-15, or Table 3-16
for a 1-byte clock period and 2 bytes of data are repeated.
NOTE
When operating in ‘word’ mode both channels must add/delete IDLEs
simultaneously. IDLEs must appear in the data stream for both channels
simultaneously, so that IDLEs may be repeated or deleted.
3.7
Ethernet Compliant Applications Modes (COMPAT = High)
The following sections discuss Ethernet compliant applications modes as implemented by the MC92603.
Different Ethernet operations and protocols as described in the IEEE Std. 802.3-2002 specification [4], are
also discussed.
3.7.1
Interface to Ethernet MAC
The operation of the transceivers in the Ethernet-compatible GMII and TBI modes and the correlation of
the port signal names to the names in the IEEE Std. 802.3-2002 specification [4] are listed in the following
two sections.
Table 3-7. Receiver Reference Clock is Slower than Transmitter Reference Clock
ADIE
COMPAT
Receive Mode
Result
Action Taken
Low
—
Overrun
2 bytes of data are lost. First byte reports overrun,
second byte is skipped.
High
Low
—
Data dropped 2 consecutive IDLEs (K28.5) are dropped
High
Low
Auto-negotiate sequence
Data dropped 16 bytes dropped (/C1/C2/C1/C2/)
High
Idle sequence
Data dropped 2 bytes dropped (/I2/)
Table 3-8. Receiver Reference Clock is Faster than Transmitter Reference Clock
ADIE
COMPAT
Receive Mode
Result
Action Taken
Low
—
Underrun
2 bytes of data are lost. First byte reports underrun,
second byte repeats byte prior to underrun.
High
Low
—
Data repeated
2 consecutive IDLEs (K28.5) are repeated
High
Auto-negotiate sequence
Data repeated
16 bytes repeated (/C1/C2/C1/C2/)
High
Idle sequence
Data repeated
2 bytes repeated (/I2/)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC92604VM | IC ETH TXRX DUAL GIG 196-MAPBGA |
| MC92604ZT | IC TXRX ETH DUAL GIG 196-MAPBGA |
| MCP2120T-I/SL | IC ENCODR/DECODR 2.5V IR 14-SOIC |
| MCP2122-E/P | IC ENCODER/DECODER IRDA 8-DIP |
| MCP2122T-E/SNG | IC ENCODER/DECODR INFRARED 8SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC92603VM | 功能描述:IC ETH TXRX QUAD GIG 256-MAPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC92604VM | 功能描述:IC ETH TXRX DUAL GIG 196-MAPBGA RoHS:是 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類(lèi)型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:16-SOIC 包裝:帶卷 (TR) |
| MC92604ZT | 功能描述:IC TXRX ETH DUAL GIG 196-MAPBGA RoHS:否 類(lèi)別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:25 系列:- 類(lèi)型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類(lèi)型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:16-PDIP 包裝:管件 |
| MC92610 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:Quad 3.125 Gbaud SERDES |
| MC92610VF | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:Quad 3.125 Gbaud SERDES |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。