參數(shù)資料
型號: MC92603VF
廠商: Freescale Semiconductor
文件頁數(shù): 69/126頁
文件大?。?/td> 0K
描述: IC TXRX ETH QUAD GIG 256-MAPBGA
標(biāo)準(zhǔn)包裝: 1
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 4/4
規(guī)程: 千兆位以太網(wǎng)
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-MAPBGA
包裝: 托盤
Receiver
MC92603 Quad Gigabit Ethernet Transceiver Reference Manual, Rev. 1
Freescale Semiconductor
3-13
In an underrun situation, data must be repeated in order to maintain synchronization between the clock
domains. If ADIE is high and COMPAT is low, the receiver interface will repeat a pair of IDLE bytes when
underrun is imminent. This allows the user to establish ‘packets’ of data that do not contain IDLEs and the
MC92603 will not insert IDLEs in the middle of these ‘packets.’ The IDLE frequency to prevent underrun
is identical to the frequency to prevent overrun, so the same conditions apply.
If an underrun occurs, the ‘underrun’ error is reported as described in Table 3-12, Table 3-15, or Table 3-16
for a 1-byte clock period and 2 bytes of data are repeated.
NOTE
When operating in ‘word’ mode both channels must add/delete IDLEs
simultaneously. IDLEs must appear in the data stream for both channels
simultaneously, so that IDLEs may be repeated or deleted.
3.7
Ethernet Compliant Applications Modes (COMPAT = High)
The following sections discuss Ethernet compliant applications modes as implemented by the MC92603.
Different Ethernet operations and protocols as described in the IEEE Std. 802.3-2002 specification [4], are
also discussed.
3.7.1
Interface to Ethernet MAC
The operation of the transceivers in the Ethernet-compatible GMII and TBI modes and the correlation of
the port signal names to the names in the IEEE Std. 802.3-2002 specification [4] are listed in the following
two sections.
Table 3-7. Receiver Reference Clock is Slower than Transmitter Reference Clock
ADIE
COMPAT
Receive Mode
Result
Action Taken
Low
Overrun
2 bytes of data are lost. First byte reports overrun,
second byte is skipped.
High
Low
Data dropped 2 consecutive IDLEs (K28.5) are dropped
High
Low
Auto-negotiate sequence
Data dropped 16 bytes dropped (/C1/C2/C1/C2/)
High
Idle sequence
Data dropped 2 bytes dropped (/I2/)
Table 3-8. Receiver Reference Clock is Faster than Transmitter Reference Clock
ADIE
COMPAT
Receive Mode
Result
Action Taken
Low
Underrun
2 bytes of data are lost. First byte reports underrun,
second byte repeats byte prior to underrun.
High
Low
Data repeated
2 consecutive IDLEs (K28.5) are repeated
High
Auto-negotiate sequence
Data repeated
16 bytes repeated (/C1/C2/C1/C2/)
High
Idle sequence
Data repeated
2 bytes repeated (/I2/)
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