參數(shù)資料
型號： MC68HC916X1
廠商： Motorola, Inc.
英文描述： 16-Bit Modular Microcontroller(16位模塊化微控制器)
中文描述： 16位微控制器模塊（16位模塊化微控制器）
文件頁數(shù)： 78/172頁
文件大?。?/td> 1035K
代理商： MC68HC916X1
MOTOROLA
78
MC68HC916X1
MC68HC916X1TS/D
5 Analog-to-Digital Converter Module
The analog-to-digital converter module (ADC) is a unipolar, successive-approximation converter
with eight modes of operation. It has selectable 8- or 10-bit resolution. Monotonicity is guaranteed
in both modes.
ADC module conversion functions can be grouped into three basic subsystems: an analog front
end, a digital control section, and result storage. In addition, the six analog inputs can be used as
a general-purpose digital input (port ADA), provided signals are within logic level specification.
Figure 13
shows a block diagram of the ADC converter module.
5.1 Analog Subsystem
The analog front end consists of a multiplexer, a buffer amplifier, a resistor-capacitor array, and a
high-gain comparator. The multiplexer selects one of six internal or six external signal sources for
conversion. The buffer amplifier protects the input channel from the relatively large capacitance of
the resistor capacitor (RC) array. The RC array performs two functions: it acts as a sample/hold cir-
cuit, and it provides the digital-to-analog comparison output necessary for successive approxima-
tion conversion. The comparator indicates whether each successive output of the RC array is
higher or lower than the sampled input.
5.2 Digital Control Subsystem
The digital control section includes conversion sequence control logic, channel and reference select
logic, a successive approximation register, eight result registers, a port data register, and control/
status registers. It controls the multiplexer and the output of the RC array during the sample and
conversion periods, stores the results of comparison in the successive-approximation register, and
transfers the result to a result register.
5.3 Bus Interface Subsystem
The ADC bus interface unit contains logic necessary to interface the ADC to the intermodule bus.
The ADC is designed to act as a slave device on the bus. The interface must respond with appro-
priate bus cycle termination signals and supply appropriate interface timing to the other submod-
ules.
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