參數(shù)資料
型號： MC68HC916X1
廠商： Motorola, Inc.
英文描述： 16-Bit Modular Microcontroller(16位模塊化微控制器)
中文描述： 16位微控制器模塊（16位模塊化微控制器）
文件頁數(shù)： 75/172頁
文件大?。?/td> 1035K
代理商： MC68HC916X1
MC68HC916X1
MC68HC916X1TS/D
MOTOROLA
75
4.7 Exceptions
An exception is an event that preempts normal instruction process. Exception processing makes
the transition from normal instruction execution to execution of a routine that deals with an excep-
tion.
Each exception has an assigned vector that points to an associated handler routine. Exception pro-
cessing includes all operations required to transfer control to a handler routine, but does not include
execution of the handler routine itself. Keep the distinction between exception processing and ex-
ecution of an exception handler in mind while reading this section.
4.7.1 Exception Vectors
An exception vector is the address of a routine that handles an exception. Exception vectors are
contained in a data structure called the exception vector table, which is located in the first 512 bytes
of bank 0. Refer to
Table 37
for the exception vector table.
All vectors except the reset vector consist of one word and reside in data space. The reset vector
consists of four words that reside in program space. There are 52 predefined or reserved vectors,
and 200 user-defined vectors.
Each vector is assigned an 8-bit number. Vector numbers for some exceptions are generated by
external devices; others are supplied by the processor. There is a direct mapping of vector number
to vector table address. The processor left shifts the vector number one place (multiplies by two) to
convert it to an address.
Table 37 Exception Vector Table
Vector
Number
0
Vector
Address
0000
0002
0004
0006
0008
000A
000C
000E
0010
0012 – 001C
001E
0020
0022
0024
0026
0028
002A
002C
002E
0030
0032 – 006E
0070 – 01FE
Address
Space
P
P
P
P
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
Type of
Exception
Reset — Initial ZK, SK, and PK
Reset — Initial PC
Reset — Initial SP
Reset — Initial IZ (Direct Page)
Breakpoint
Bus Error
Software Interrupt
Illegal Instruction
Division by Zero
Unassigned, Reserved
Uninitialized Interrupt
Unassigned, Reserved
Level 1 Interrupt Autovector
Level 2 Interrupt Autovector
Level 3 Interrupt Autovector
Level 4 Interrupt Autovector
Level 5 Interrupt Autovector
Level 6 Interrupt Autovector
Level 7 Interrupt Autovector
Spurious Interrupt
Unassigned, Reserved
User-Defined Interrupts
4
5
6
7
8
9 – E
F
10
11
12
13
14
15
16
17
18
19 – 37
38 – FF
相關PDF資料
PDF描述
MC68HC9D60 Advance Information - Rev 4.0
MC68HC12D60 Advance Information - Rev 4.0
MC68HCL05C8A 8-Bit Microcontroller Units (MCU).(8位微控制器)
MC68HSC05C8A 8-Bit Microcontroller Units (MCU).(8位微控制器)
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